Digital Design and FPGA Implementation of a Wireless Video Surveillance System Vivek Shah Noel Campbell Raymond Tong Introductory Digital Systems Laboratory TA: Javier Castro 5/19/2006 Abstract: This laboratory used a Xilinx FPGA to create a video surveillance system with wireless transmission as a digital circuit. The surveillance system was fully functional and able to capture, encode, and transmit and image, as well as receive, decode, and display the image. ModelSim simulations were used to test the various modules of the surveillance system, as well as Verilog test benches. After a comprehensive suite of tests found no errors in the design, the surveillance system was programmed into a FPGA and passed physical testing as well.2Table of Contents 1. Title Page and Abstract 1 2. Table of Contents 2 3. List of Figures, Tables, and Equations 3 4. Operational Overview 4 5. Module Description and Implemention 5 a. Capture-Encode-Transmit System 5 i. Video Capture 5 1. NTSC Decoder 5 2. Store 64 6 3. Set Address 6 4. VGA Controller 7 5. Delay 7 6. YCrCb to RGB converter 7 7. Display 7 ii. Video Memory (Encoder) 8 iii. Encoder 8 1. DCT Multiply 10 a. DCT Front 10 b. DCT Table 10 c. Multiplier Shift Register 10 d. DCT Back 10 2. Encode_memory_register 11 3. Encode_FSM 11 iv. Wireless Block Memory 12 v. Wireless Transmitter 12 1. Transmitter Control Unit 13 a. TX Shift Register 13 b. RS232 Sender 13 vi. Wireless Packet Sender 14 b. Receiver-Decode-Display System 14 i. Wireless Receiver 14 1. Packet Receiver 14 2. Receiver Control Unit 14 a. RS232 Receiver 14 b. RX Shift Register 14 ii. Wireless Block Memory (Decoder) 15 iii. Decoder 15 1. DCT Multiply Decode 16 a. DCT Front Decode 16 b. DCT Table 16 c. Multiplier Shift Register 16 d. DCT Back Decode 16 2. Decoder FSM 17 iv. Video Memory (Decode) 17 v. Video Display 17 1. Read 64 18 6. Testing and Debugging 19 7. Conclusion 22 8. Appendix 233List of Figures Figure 1 – System Diagram.........................................................................................................................................................4 Figure 2 – Block diagram of Video Capture Module. .................................................................................................................5 Figure 3 – Set Address Finite State Machine...............................................................................................................................6 Figure 4 – Writing to Video Memory Process.............................................................................................................................8 Figure 5 – DCT coefficients used in the encoded block..............................................................................................................9 Figure 6 – Block diagram for encoder module. ...........................................................................................................................9 Figure 7 – State Transition Diagram for Encoder FSM.............................................................................................................12 Figure 8: Transmitter Block Diagram........................................................................................................................................13 Figure 9 - Wireless Receiver Block Diagram............................................................................................................................14 Figure 10 – Block diagram of Decoder module.........................................................................................................................16 Figure 11 – State Transition Diagram for Decode FSM............................................................................................................17 Figure 12 – Block diagram of the Video Display Module.........................................................................................................18 Figure 13 – Video Capture/Display Testbench..........................................................................................................................19 Figure 14 – Video Encoder Testbench ModelSim waveform outputs.......................................................................................20 Figure 15 – Decoder Testbench ModelSim waveform output...................................................................................................21 Figure 16: Logic analyzer screenshot verifying overall system data flow.................................................................................22 List of Tables Table 1 – Blanking and Synching Signal Values.........................................................................................................................7 Table 2 – DCT Coefficient matrix as stored in memory using fixed point notation..................................................................10 Table 3 –Outputs for ENCODE_BLOCK state of encode FSM................................................................................................12 List of Equations Equation 1 – Matrix novation of DCT using 8x8 matrices..........................................................................................................9 Equation 2 – Two dimensional Discrete Consine Transform algorithm......................................................................................9 Equation 3 – Matrix notation of IDCT using 8x8 matrices........................................................................................................15 Equation 4 – Two dimensional Inverse Discrete Cosine Transform algorithm.........................................................................154Operational Overview The problem with conventional security systems today is that they are mostly wired, meaning the security station must be placed within a fixed distance from the camera. This usually means that the security camera must be placed in a fixed location because it is difficult to move a wire embedded in the wall or ceiling of a building. In order to provide more flexibility, this project implemented a wireless security system where image data is sent wirelessly to a receiver station and displayed on the screen. However, in a wireless system where the transfer rate is more restrictive than a wired system,
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