Timing System Timing System Applications 1 Timing System components Counting mechanisms Input capture mechanisms Output capture mechanisms 2 Counting system 16 bit unsigned counter TCNT incremented at a fixed rate determined by two programmable bits PR1 and PR0 The counter cannot be stopped or reset For an E clock of 2 MHz 500 ns period 3 Input Capture System The 68HC11 has 3 input capture modules There are no directions register bits associated with PA2 0 These bits are always inputs Each input Capture module has And external input pin ICn A flag bit Two edge control lines An interrupt mask bit A 16 bit input capture register 4 Input Capture basic structure 5 Actions occurring as a result of a capture event 1 The current TCNT value is copied into the input capture register TICn 2 The input capture flag is set ICnF 3 If the mask bit is armed ICIn set to 1 an interrupt is requested 6 Input Capture Registers 7 Input Capture modes IC1 IC2 IC3 8 Input Capture flags When an input capture event edge of the type activated TCTL2 reg occurs on the IC pin the corresponding input capture flag is set IC1F IC2F IC3F and the current value of TCNT is stored in the corresponding timer control register TIC1 TIC2 TIC3 Every time TCNT overflows from FFFF to 0000 the TOF flag is set The software can determine if an input capture event occurred by reading the flag registers 9 Input Capture flags The flags are cleared by writing a 1 into the specific flag bit we wish to clear example ldaa 01 staa 1023 TFLG1 0x01 Do not use bset or TFLG1 0x01 no read modify write operations If for example we had 0xFF in TFLG1 as a result of the OR we end up writing 0xFF in TFLG1 so we clear all the flags instead of the LSB only 10 Input Capture masks Interrupt mask for the TOF TCNT rate If the input capture flags are armed IC1I IC2I IC3I TOI then an interrupt will be requested as soon as the flag is set 11 Input Capture Applications Arm the flag bit so that an interrupt is requested on the active edge of an external signal Perform two rising edge input captures and subtract the two measurement to get period Perform a rising edge capture then a falling edge capture and subtract the two measurements to get pulse width 12 Real Time interrupt using Input Capture Example Create a periodic interrupt one interrupt every ms Every time there is the interrupt we increment a global variable TIME 0 693 x CT x RA 2RB 13 Real Time interrupt using Input Capture There is a latency between the rise edge of the interrupt and when the increment of TIME really occurs 1 finish the current instruction 2 process the interrupt 3 execute the interrupt handler including changing TIME 6811 Longest instruction 41 cycles Process the interrupt 14 cycles Execute handler Max latency 83 cycles 41 5 s 28 cycles our code 14 Real Time interrupt using Input Capture The interrupt software 1 performs a poll check the flag 2 acknowledge the interrupt clear the flag 3 increments the global variable make sure the execution of the initialization software cannot be interrupted set IC3 to be active on pos edge and leave the others alone arm IC3 interrupt and leave the others alone make sure the interrupt flag for IC3 is clear 15 Real Time interrupt using Input Capture Poll the flag If we jumped to the interrupt routine and the flag is not set then there is an ERROR Total 28 16 Real Time interrupt using Input Capture 17 Period Measurement Resolution smallest change in period that can reliably be measured Precision number of separate and distinguishable measurements that we can take e g 65536 16 bits Range The minimum and maximum values that can reliably be measured 18 16 bit period measurement with 500 ns resolution using input capture V V The period is calculated as the difference in TIC1 values from on rising edge to the other 65535 cycle This method does not operate properly if the period is larger than The shortest period that can be handled is given by num cycles to process the interrupt num cycles of the handler The resolution is 500 ns because the period must increase of at least this amount before the difference between TIC1 measurements can be appreciated 19 32 bit period measurement with a 500 ns resolution using input capture Every time the TCNT overflows from FFFF to 0000 the TOF flag is set We can increase the precision of the period measurement by counting the number of TOF flag setting events during one period 20 Pulse width measurements The basic idea is to cause an input capture event on both the rising and falling edges of an external signal 21 Pulse width measurement using busy waiting Multivibrator T 0 45 R R1 C We chose R1 and C so that the resistance range 0 R 1M maps into 500 ns T 1000 s T 0 45 R C T 500 ns R 1K 22 Pulse width measurement using busy waiting 23 Pulse width measurement using busy waiting 24 Pulse width measurement using interrupts Both the rising and falling edges will generate an input capture interrupt IC1 IC1 Rising TIC1 PW TIC1 Rising 25 Pulse width measurement using two input capture channels The lower bound on the range is determined by the software overhead to process the input capture interrupt The rising edge time will be measured by IC2 without the need of an interrupt routine and the falling edge interrupt will be handled by IC1 26 Output compare system The 68HC11 has 5 output compare modules There is a direction register bit for PA7 OC1 DDRA7 bit in PACTL and a direction register bit for PA3 OC5 DDRA3 bit in PACTL Each output compare module has An external output pin OCn A flag bit A force output compare control bit FOCn Two control bits OMn OLn An interrupt mask bit A 16 bit output compare register 27 Output compare basic structure 28 Actions occurring as a result of an output compare event An output compare event occurs when either The 16 bit TCNT matches the the 16 bit OC register The software writes a 1 to the FOC bit As a result of an output compare event 1 The OCn output signal change 2 The output compare flag OCnF is set 3 If the mask bit OCnI is armed an interrupt is requested 29 Output compare registers 30 Output compare modes and levels The TCTL1 register determines what effect the output compare event will have none toggle clear set on the output pins OC1 OC2 OC3 OC4 OC5 31 Output compare flags The software can determine if an output compare event occurred by reading the flag registers The flags are cleared by writing a 1 into the specific flag bit we wish to clear 32 Output compare mask If the output