Unformatted text preview:

10 25 24 4 54 PM The Wayback Machine https web archive org web 20230622132427 https inst eecs berkeley edu Lab 1 Intro to OpenLane and Skywater 130 CS 250 Fall 2020 Home Outline Resources Piazza Lab 1 Intro to OpenLane and Skywater 130 All blame to Arya Reais Parsi aryap at berkeley dot edu Introduction The purpose of this lab is to familiarise you with the efabless OpenLane VLSI design flow and the Skywater 130nm PDK OpenLane is an open source VLSI flow built around open source tools That is it s a collection of scripts that run these tools in the right order transforming their inputs and outputs as appropriate and organising the results like Berkeley s own HAMMER OpenLane and the 130nm PDK are the result of a recent concerted effort by various industry players to democratise ASIC design To understand the project watch the introductory presentations made by various key contributors 1 TODO you FOSSi Dial Up Tim Ansell Skywater PDK Fully open source manufacturable PDK for a 130nm process 2 TODO you FOSSi Dial Up Mohamed Shalan OpenLane A Digital ASIC Flow for SkyWater 130nm Open PDK And for interest FOSSi Dial Up Mohamed Kassem The striVe RISC V SoC Family on SkyWater 130nm FOSSi Dial Up James Stine Designing new 130nm cells for SkyWater 130nm Collaboration and communication This is a collaborative learning process We will get the most it of this by sharing our discoveries and ideas as we go along To that end please join the class Slack channel and be attentive to people s messages Please avoid Piazza for technical help https web archive org web 20230622132427 https inst eecs berkeley edu cs250 fa20 labs lab1 1 5 10 25 24 4 54 PM TCL Lab 1 Intro to OpenLane and Skywater 130 For reasons that will become obvious most digital design flows use or heavily rely on TCL scripts in some way TCL Tool Command Language is designed specifically to address the need to run multiple disparate tools and glue them together It s less complicated than Python and more sane than any shell script It s straightforward to read but a non trivial grasp of the language will be invaluable in your career as an electronic design engineer or even as a software engineer A lot of OpenLane is written in TCL TODO you Work through the first 15 sections of the TCL Tutorial Set up instructions We are working on setting up instructional machines for your use A key benefit of using an open source tool flow though is that you can run it at home For this lab we will try to do just that OpenLane is distributed as source that compiles and is packaged into a Docker app Docker is sort of like a container and uses a lot of the same kernel functions but is actually proprietary third party software for isolating applications In this case it enables OpenLane to package specific versions of their dependencies together TODO you 1 Install Docker for your platform 2 Install Magic VLSI from source or using the package manager for your platform 3 Follow the OpenLane set up instructions and make sure the test design spm works Use the default PDK VARIANT We will call your OpenLane installation directory OPENLANE ROOT For example if I git clone git github com efabless openlane git home arya some dir I would export OPENLANE ROOT home arya some dir NOTE Getting Docker to run might be tricky for some platforms For Debian 10 I had to modify my boot config to get Docker to run NOTE Once Skywater 130 and OpenLane are installed the Docker run command assumes that you have PDK ROOT set to the directory in which you put the various PDK repositories https web archive org web 20230622132427 https inst eecs berkeley edu cs250 fa20 labs lab1 2 5 10 25 24 4 54 PM Lab 1 Intro to OpenLane and Skywater 130 and to which open pdks installed the artifacts Make sure you set PDK ROOT every time you open a new shell Or at least make sure it s an environment variable whenever you run the docker command A convenient way to avoid having to remember where this is to create a sourceme sh script in your PDK ROOT that sets the variable to the directory its located in cat sourceme sh export PDK ROOT readlink f dirname BASH SOURCE 0 But readlink isn t super portable so your system might need an alternative A toy example gcd v Now for the juicy part We re going to create a new design in OpenLane add some Verilog we baked earlier and run the whole flow Then we ll look at the outputs 1 Create a new design in OpenLane Make sure PDK ROOT is set cd OPENLANE ROOT docker run it v pwd openLANE flow v PDK ROOT PDK ROOT e PDK ROOT PDK ROOT u In the container run flow tcl design gcd init design config The has now created OPENLANE ROOT designs gcd and a basic config tcl configuration script 2 Go there and add the pre baked sources cd OPENLANE ROOT designs gcd wget https inst eecs berkeley edu cs250 fa20 files gcd tar xz tar xJf gcd tar xz rm gcd tar xz 3 Modify config tcl to set the clock frequency constraint make sure the clock port name matches the clock port in gcd v hint the default should be fine 4 Run flow tcl in the docker container docker run it v pwd openLANE flow v PDK ROOT PDK ROOT e PDK ROOT PDK ROOT u container starts https web archive org web 20230622132427 https inst eecs berkeley edu cs250 fa20 labs lab1 3 5 10 25 24 4 54 PM Lab 1 Intro to OpenLane and Skywater 130 flow tcl design gcd 5 Wait 6 Once the run is complete you should see a new directory in OPENLANE ROOT designs gcd runs It ll be named after the UTC time pertaining to the run Call that subdirectory LATEST RUN and descend into it You should see logs reports results tmp If you see errors log or errors txt that is bad 7 Look at the timing reports in LATEST RUN reports synthesis 8 What is the critical path Currently by default no power report is generated You can enable it by uncommenting these lines in OPENLANE ROOT scripts sta tcl 29 report power 30 report power env opensta report file tag power rpt Once modified re run the flow and look at the power report also in LATEST RUN reports synthesis View layout kLayout The final output of the flow is a GDSII file containing all of the ASIC geometry We can view it with either Magic VLSI or kLayout 1 Install kLayout for your platform by package manager or from source 2 Set up the Skywater 130 technology in kLayout 3 Go to Tools Manage Technologies 4 Right click on the Technologies pane and select Import Technology 5 Navigate to PDK ROOT sky130A libs tech klayout and select sky130A lyt 6 This will create the EFS8A technology Close …


View Full Document

Berkeley COMPSCI 250 - Lab 1 - Intro to OpenLane and Skywater 130

Download Lab 1 - Intro to OpenLane and Skywater 130
Our administrator received your request to download this document. We will send you the file to your email shortly.
Loading Unlocking...
Login

Join to view Lab 1 - Intro to OpenLane and Skywater 130 and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Lab 1 - Intro to OpenLane and Skywater 130 and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?