1Addendum:Digital Integrated CircuitsECE 152A – Fall 2006October 17, 2006ECE 152A - Digital Design Principles2Properties of Digital Integrated Circuits The Ideal Digital Circuit2October 17, 2006ECE 152A - Digital Design Principles3Digital IC Definitions Amplitude and Voltage Transfer CharacteristicsOctober 17, 2006ECE 152A - Digital Design Principles4Digital IC Definitions Noise Margins Sources of noise Definition of noise margins3October 17, 2006ECE 152A - Digital Design Principles5TTL Electrical Characteristics Standard TTL (54/74)October 17, 2006ECE 152A - Digital Design Principles6TTL Electrical Characteristics Comparison of Standard TTL (74), SchottkyClamped TTL (74S) and Low Power SchottkyTTL (74LS)4October 17, 2006ECE 152A - Digital Design Principles7TTL vs. CMOS Comparison of Electrical CharacteristicsOctober 17, 2006ECE 152A - Digital Design Principles8VLSI Circuits Intel 8080Address Bus DriversBidirectional Data BusDriver/ReceiversGround PadRegister ArrayInstructionDecodeArithmetic Logic UnitTiming and Control5October 17, 2006ECE 152A - Digital Design Principles9VLSI Circuits Intel PentiumOctober 17, 2006ECE 152A - Digital Design Principles10Power Dissipation in CMOS Circuits There are two components that establish the amount of power dissipation in a CMOS circuit Static Power Dissipation Constant current Dynamic Power Dissipation Currents attributed to switching6October 17, 2006ECE 152A - Digital Design Principles11Power Dissipation in CMOS Circuits Static dissipation Reverse bias leakage current Parasitic diode between diffusion regions and substrate Subthreshold leakage current in static CMOS circuits pMOS and/or nMOS devices not completely turned off Constant current in non static CMOS circuits Psuedo-nMOS, I/O, Analog circuits, etc.October 17, 2006ECE 152A - Digital Design Principles12Power Dissipation in CMOS Circuits Dynamic dissipation Switching transient current Occurs on transition from 1 to 0 (or 0 to 1) Results in short current pulse from VDDto VSS Referred to as “short-circuit dissipation” Dependent on rise and fall times Slow rise and fall times increase short circuit current Critical in I/O buffer design Dominant component of dynamic power with little or no capacitive loading7October 17, 2006ECE 152A - Digital Design Principles13Power Dissipation in CMOS Circuits Dynamic dissipation (cont) Charging and discharging of load capacitances As capacitive loading is increased, the charging and discharging currents begin to dominate the current drawn from the power suppliesOctober 17, 2006ECE 152A - Digital Design Principles14Power Dissipation in CMOS Circuits Dynamic dissipation (cont) Charging and discharging of load capacitances8October 17, 2006ECE 152A - Digital Design Principles15Power Dissipation in CMOS Circuits Dynamic short-circuit vs. capacitive
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