Quiz 3ECE 486/586 Spring 2005Name: Student Number: 1) Consider the characteristics of a memory system given below. Cache size = 512 bytesMain memory size = 4096 bytesCache line/block size = 64 bytesReplacement policy = least recently usedWrite policy = write-back Assume the cache is initially “empty” meaning that no cache blocks are considered valid at the start of the program. Assume a program to be executed on this system generates the following sequence of main memory byte addresses: 0, 512, 130, 800, 60, 1024. NOTE: Show all your work on all parts of the problem!What is the best possible hit rate for this sequence of addresses? (5 points)We have 6 different main memory addresses, but only two of them are in the same main memory block, 0 and 60. Therefore, the only possible hit is for memory address 60 to reside in the cache when referenced since its main memory block was referenced previously. So, possible hit rate = 1/6 = 16.67%. For a 4-way set-associative cache configuration, what is the hit rate? (5 points) mmaddresstag(binary)index(binary)offset(binary)mm blk# (/64)cm set# (%2)cm blk# hit/miss000000 0 0000000 0 0,1,2,3 miss51200100 0 0000008 0 0,1,2,3 miss13000001 0 0000102 0 0,1,2,3 miss80000110 0 10000012 0 0,1,2,3 miss6000000 0 1111000 0 0,1,2,3 hit102401000 0 00000016 0 0,1,2,3 misshit rate = 1/6 = 16.67%Calculate the total size of the cache. (5 points)Total cache size = (8 blks * 64 bytes) + (8 blks * 5-bits for tag) + (8 blks * 1-bit valid bit) + (8 blks * 1-bit dirty bit) = 512 bytes + 40 bits + 8 bits + 8 bits = 519 bytesFinally, draw the cache and indicate which main memory blocks reside in each cache block AFTER the sequence of memory references is completed. (15 points) cache cacheD V Tag Data blk # set #x 1 00000 mm blk # 0 0 0 x 1 01000 mm blk # 16 1 0x 1 00001 mm blk # 2 2 0 x 1 00110 mm blk # 12 3 0 0 0 xxxxx 4 1 0 0 xxxxx 5 1 0 0 xxxxx 6 1 0 0 xxxxx 7 1NOTE: The cache block number and the cache set number are NOT part of the cache. They are only used to show the organization of the