Course Objectives: The purpose of this course is to learn and develop techniques for designing digital logic circuits used in computers and mobile devices, such as laptops, smartphones and tablets. Specifically, we will study the technologies and design methods used in the development of microprocessors, memories, USB drives, CD/DVD drives and LCD displays. We will also be using computer-assisted VHDL design tools commonly used in the logic design industry. ECE 2500 Digital Logic Syllabus for Fall 2017 Prepare report. Give presentation Aug 24 Aug 28 Instructor: Dr. Dean Johnson Office: B-228 West Parkview Email: [email protected] Hours: T&R 10:30-11:30 am Course Procedures and Policies: Exams and Quizzes: There will be two hourly exams, plus a two-hour final exam. The date of these exams are: Tuesday, October 10th and November 21st; with the FINAL EXAM being Thursday, December 14th, at 10:15 am in the morning. Exams are closed book/notes/calculator and consist entirely of multiple-choice questions, and are computer graded. The exam questions are similar in subject to that found on the weekly web quizzes. The final is comprehensive over all course material; including the first two exams and all web quizzes. Students are required to attend all exams as scheduled; failure to do so will in a zero score for any examination not attended (if an emergency arises, you must contact the instructor before any exam.) If a make up exam is merited, they can be more difficult. Lab work: 10 experiments and two lab assessment exercises. (12 total lab meetings) Many laboratory experiments require prelab work in the form of written calculations in your lab notebook or computer simulations. If you don't show up for a lab, you forfeit the points associated with the entire lab that week, and generally cannot later make up the lab. Exceptions will be made only for those individuals who contact their lab instructor before the lab, giving an adequate reason why they cannot attend that day. Contact your lab instructor at his/her office hours for help with lab calculations. Note: you must also achieve a passing grade in the lab in order to pass the entire course. WMU Honesty Policy: Attempting to obtain credit for work (lab, hw, exams) done by somebody else is illegal and punishable in this class. You are responsible for making yourself aware of and understanding the policies and procedures in the Undergraduate Catalog that pertain to Academic Honesty. http://catalog.wmich.edu/content.php?catoid=24&navoid=974 These policies include cheating, fabrication, falsification and forgery, multiple submission, plagiarism, complicity and computer misuse. Materials Used in the Class: 1. Text: Introduction to Logic Design, 3th Ed., by Alan Marcovitz, McGraw-Hill, 2010. We do not use the ‘Learn Smart’ online feature 2. Connect homework registration: Go to http://connect.mheducation.com/class/ece2500-fall-2017 Go to the bottom of the page where it says “ACCESS CODE or ACCESS ONLINE. (Note: a circuit analysis book will appear instead of ours.) Enter the registration code from the card on back of new textbook bought from the WMU bookstore. Else, click “Courtesy Access” (good for 14 days) if you bought the new/used textbook some other way.) The online access costs $100. 3. Lab notebook: (permanent bound --spiral or hardbound), quad ruled (i.e. square grid); alternating white and yellow (or blue) paper (the yellow/blue paper are used for copies). 4. Lecture notes: found on course website homepages.wmich.edu/~johnson/ece250 Note: the lecture notes are in Amazon mobi format, and may be read by laptops and mobile devices that have a Kindle app. 5. iClicker Reef: Subscription on iPhone/Android/laptop is required (~$15/sem). Physical remote is not supported 6. Elearning: At GoWMU login. Can view your exam scores and grades.Homework: HW problems are submitted on Connect (see point 2 above). HW problems change after 3 attempts but they may be done as many times as necessary to improve score, until due date. You may submit the HW and revisit later if score is less than 100%. Learn Smart does not apply to our course. Grading: View on Elearning. Grades are determined on the basis of the following guaranteed grade scale: Exam I 20% 93 - 100 A Exam II 20% 87 - 92 BA Homework 10% 80 - 86 B Lab Work 25% 74 - 79 CB Final Exam 25% 68 - 73 C 100% 63 - 67 DC iClicker ~3% (bonus) 58 - 62 D 0 - 57 E GENERAL COURSE SCHEDULE FOR ECE 2500, Fall 2017 (Revised: ) Week September 5 7 12 14 19 21 26 28 October 3 5 10 12 17 19 24 26 November 31 2 7 9 14 16 21 28 30 December 5 7 Lecture Topic The Digital World More DW, Boolean Algebra Combinational Logic Circuits minterms and K-maps Maxterms and more K-Maps Exam I (October 10)2 Important CLCs, ROM More ROM, PLDs, RAM More RAM, Smartphones Latches, Flip/Flops & States State Machine Design Exam II (November 21)2 Important SLCs Finish and Review Reading 1.1-1.2* 2.2-2.4, 2.7 2.6, 2.8 2.5, 3.1-3.2 3.3-3.4* None 5.2-5.4 5.6* 6.1-6.3 7.1-7.3* 7.4* 8.1-8.2* None Lab Exercise1 NO LABS 1 CD/DVD drives 2 Microprocessor Logic 3 Logic Design: Adders 4 Logic Design: 7-Seg Decoder 5 Mobile Device Components 6 Standard Logic Blocks 7 Lab Assessment#13 8 Smartphone Apps 9 Latches, SRAM & Androids 10 Sequential Logic Circuits NO LABS 11 Advanced SLC Design 12 Lab Assessment#23 Final Exam is Thursday, December 14th, 10:15 am in the same room Notes: 1. Lab exercises available weekly on-line on the ECE 2500 homepage. Most labs require prelab work. 2. If WMU should officially close due to bad weather (or any other problem) on a date of an exam, the exam shall take place at the next lecture time. 3. A lab assessment is a one-hour open book/notes lab exam taken on an individual basis. The assessment involves written calculations as well as hands-on lab work. If you are working in a group of two, one of you will arrive at the beginning of the lab period to take your assessment; the partner will then arrive one hour afterwards to take his/hers. The assessments are worth four times the points of a regular lab. * Much more detail is provided in the lecture notes than in text; don’t miss these