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Wake Tech MAE 405 - 1_2

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CS M151B EE M116C Computer Systems Architecture Glenn Reinman 4731G Boelter Hall reinman cs ucla edu The BIG Picture Same components for all kinds of computer Desktop server embedded 1 4 Under the Covers Components of a Computer Input output includes User interface devices Storage devices Display keyboard mouse Hard disk CD DVD flash Network adapters For communicating with other computers Chapter 1 Computer Abstractions and Technology 2 Opening the Box Capacitive multitouch LCD screen 3 8 V 25 Watt hour battery Computer board Chapter 1 Computer Abstractions and Technology 3 Inside the SoC Snapdragon 810 Chapter 1 Computer Abstractions and Technology 4 Inside the Processor CPU Datapath performs operations on data Control sequences datapath memory Cache memory Small fast SRAM memory for immediate access to data Chapter 1 Computer Abstractions and Technology 5 Abstractions The BIG Picture Abstraction helps us deal with complexity Instruction set architecture ISA The hardware software interface Application binary interface Hide lower level detail The ISA plus system software interface Implementation The details underlying and interface Chapter 1 Computer Abstractions and Technology 6 Electronics technology continues to evolve Increased capacity and performance Reduced cost DRAM capacity Year Technology Relative performance cost 1951 Vacuum tube 1965 Transistor 1975 Integrated circuit IC 1995 Very large scale IC VLSI 2013 Ultra large scale IC 1 35 900 2 400 000 1 5 Technologies for Building Processors and Memory Technology Trends 250 000 000 000 Chapter 1 Computer Abstractions and Technology 7 Semiconductor Technology Silicon semiconductor Add materials to transform properties Conductors Insulators Switch Chapter 1 Computer Abstractions and Technology 8 Manufacturing ICs Yield proportion of working dies per wafer Chapter 1 Computer Abstractions and Technology 9 Intel Core i7 Wafer 300mm wafer 280 chips 32nm technology Each chip is 20 7 x 10 5 mm Chapter 1 Computer Abstractions and Technology 10 Integrated Circuit Cost Cost per wafer Cost per die Dies per wafer Yield Dies per wafer Wafer area Die area 1 Yield 1 Defects per area Die area 2 2 Nonlinear relation to area and defect rate Wafer cost and area are fixed Defect rate determined by manufacturing process Die area determined by architecture and circuit design Chapter 1 Computer Abstractions and Technology 11


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