EE 231L Fall 2005EE 231L Lab 5Building the ComputerNow that you have designed and simulated your computer, it is time to build and test it. Youwill build the computer on a printed circuit board which has a socket for an Altera EPF8636ALC84PLD and a Cypress CY7C128 memory chip. The EPF8636 in programmed in the circuit — you willnot remove the chip and program it at the programming station. (The program in the EPF8636is stored in volatile memory, so the program is lost when power is removed.) The printed circuitboard has the hardware needed to program the EPF8636 through the parallel port on your labcomputer. Figure 1 shows a diagram of the printed circuit board.Figure 2 shows the first page of the data sheet for the memory chip you will use. Note that thememory chip has eleven address lines, while your design has only eight address lines. You shouldconnect the three unused address lines (A10, A9, and A8) to VCC or ground. You then need toconnect the eight address lines used by the computer (A7-A0), the eight data lines (called I/O 7-0on the data sheet) and the three control lines — chip select (called CE on the data sheet), outputenable, and write (called WE on the data sheet). (VCC and GND are already connected on theprinted circuit board.)It will be use ful to assign pins on your EPF8636 in order to make the computer e asier to build.Figure 3 shows the computer I built. I assigned Pin 43 to be the Output Enable line, Pin 44 to bethe Write Enable line, Pin 46 to be Data 7, etc. I assigned the pins so that it would be convenientto wire the EPF8636 to the memory chip. I also assigned pins of the input port so they would betogether, and I could connect the eight input lines to the source of the inputs. To assign pins inMax+Plus II, you go to the Assign menu, the Pin/Locati on/Chip sub-menu, and make the pinassignments there.When you wire your computer, some of the pins on the EPF8636 are labeled V, G and P. Thepins labeled V have been connected to +5V. Those labeled G have been connected to ground. Thoselabeled P are used for programming the EPF8636. Do not connect anything to the pins labeled P.You can use the pins labeled V or G to connect to the unused address lines of the memory chip.You should also connect a G pin on the printed circuit board to the ground on your breadboard.(You will use your breadboard to supply the clock for the computer, and input data.)1EE 231L Fall 20052K x 8 Static RAMCY7C128ACypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600Document #: 38-05028 Rev. ** Revised August 24, 200128AFeatures• Automatic power-down when deselected• CMOS for optimum speed/power• High speed—15 ns• Low active power—660 mW (commercial)—688 mW (military—20 ns)• Low standby power—110 mW (20 ns)• TTL-compatible inputs and outputs• Capable of withstanding greater than 2001V electro-static discharge• VIH of 2.2VFunctional DescriptionThe CY7C128A is a high-performance CMOS static RAM or-ganized as 2048 words by 8 bits. Easy memory expansion isprovided by an active LOW Chip Enable (CE), and active LOWOutput Enable (OE) and three-state drivers. The CY7C128Ahas an automatic power-down feature, reducing the powerconsumption by 83% when deselected.Writing to the device is accomplished when the Chip Enable(CE) and Write Enable (WE) inputs are both LOW. Data on the eight I/O pins (I/O0 through I/O7) is written into thememory location specified on the address pins (A0 throughA10).Reading the device is accomplished by taking Chip Enable(CE) and Output Enable (OE) LOW while Write Enable (WE)remains HIGH. Under these conditions, the contents of thememory location specified on the address pins will appear onthe eight I/O pins.The I/O pins remain in high-impedance state when Chip En-able (CE) or Output Enable (OE) is HIGH or Write Enable (WE)is LOW.The CY7C128A utilizes a die coat to insure alpha immunity.Logic Block DiagramPinConfigurationsC128A–1A1A2A4A5A6COLUMNDECODERROW DECODERSENSE AMPSINPUT BUFFERPOWERDOWNWEOEI/O0CEI/O1I/O2I/O3Top ViewLCC12345678910111415162019181721242322Top ViewDIP/SOJ/SOIC1213A6A5A4A3WEVCCA8A9A10I/O5I/O4I/O3C128A–2A7I/O0I/O1CEOE128 x 16 x 8ARRAYI/O7I/O6I/O5I/O47C128AA0C128A–3A3A7A8A9A1024456789103 2 1 2311 12 13 14 1522212019181716A5VCC7C128AA62I/OA4A3A2A1WECEA0A9I/O2GNDI/O7I/O6A2A1A03I/O4I/O5I/OGNDA7A8OEA10I/O7I/O6I/O0I/O1Selection Guide7C128A-15 7C128A-20 7C128A-25 7C128A-35 7C128A-45Maximum Access Time (ns) 15 20 25 35 45Maximum OperatingCurrent (mA)Commercial 120 120 120 120 120Military - 125 125 125 125Maximum StandbyCurrent (mA)Commercial 40 20 20 20 20Military - 20 20 20 20Fig-ure 1. First page of the memory data sheet.2EE 231L Fall 2005Figure 2. Diagram of the printed circuit card.3EE 231L Fall 2005Data Lines D7−D3Input PortDatal Lines D2−D0ClockAddress Lines A7−A0Memory Control LinesFigure 3. Picture of a wired