Fundamentals of Digital LogicMechatronics Concept MapDigital LogicReview of Logic FunctionsTruth Tables for Logic FunctionsBoolean Algebra Laws and IdentitiesDemorgan’s TheoremCombinatorial LogicInternal Construction – Inverter (TTL)Inverter OperationCMOS InverterLogic Chips - c. 1960’s and 1970’sDigital Logic FamiliesCombinatorial Logic Circuit DesignLogic Chips c. 1980 – pres.Field Programmable Gate Array (FPGA)Sequential LogicR-S Flip-FlopTriggering Flip-FlopsOther Types of Flip-Flops - 1Other Types of Flip-Flops - 2Sequential Logic Applications - 1Sequential Logic Applications - 2Sequential Logic Applications - 3Sequential Logic Applications - 4555 Timer ICFundamentals of Digital LogicB. Furman15NOV2012Mechatronics Concept MapSystem toControlSensorSignalConditioningController(Hardware & Software)PowerInterfaceActuatorUserInterfacePowerSourceBJ Furman 26JAN06ME 106ME 154ME 157ME 195ME 120ME 297AME 106ME 120ME 106ME 190ME 187ME 110ME 136ME 154ME 157ME 182ME 189ME 195ME 106ME 120ME 106EE 118Digital LogicCombinatorial LogicThe combination of logic states (0’s and 1’s) at the inputs of logic gates (digital logic elements) determines the output state according to the logic function.AND, OR, NOT, XORNAND, NOREx. 7447 BCD-to-7-segment decoder; ‘enable’ inputsSequential LogicThe combination of input logic states and their sequencing determines the output stateFlip-flopsEx. Computer memory, microcontroller registersReview of Logic FunctionsAND, OR, NOT, XOR, NAND, NORTruth Tables for Logic FunctionsLogic Function ORA B Z 0 0 0 0 1 1 1 0 1 1 1 1 Logic Function ANDA B Z 0 0 0 0 1 0 1 0 0 1 1 1 Logic Function NORA B Z 0 0 1 0 1 0 1 0 0 1 1 0 Logic Function NANDA B Z 0 0 1 0 1 1 1 0 1 1 1 0 Logic Function NOTA Z 0 1 1 0 Logic Function XORA B Z 0 0 0 0 1 1 1 0 1 1 1 0 U1OR2U1OR2U1OR2Boolean Algebra Laws and IdentitiesSee the handoutDemorgan’s TheoremYou can swap shapes (AND or OR), if at the same time you invert all inputs and outputs.BABA -Combinatorial LogicThe three logic functions, AND, OR, and NOT can be used to build any digital deviceNAND gates or NOR gates are universa l, i.e., can be used to construct the three logic functions, hence any digital deviceEx.ZAInternal Construction – Inverter (TTL)(Source: http://www.allaboutcircuits.com/vol_4/chpt_3/2.html)input outputLogic Function NOTA Z 0 1 1 0 A ZInverter OperationInput High (1) Input Low (0)5 V0 V(Source: http://www.allaboutcircuits.com/vol_4/chpt_3/2.html)CMOS Inverterhttp://www.allaboutcircuits.com/vol_4/chpt_3/7.htmlLogic Chips - c. 1960’s and 1970’sMulti-input versions exist Examples:7421 Dual 4-input AND74LS00 Quad 2-input NANDhttp://www.oup.com/us/pdf/microcircuits/students/logic/74LS00-motorola.pdfDigital Logic FamiliesSee the handoutCombinatorial Logic Circuit DesignVote counting circuitLogic Chips c. 1980 – pres.Programmable logic devices (PLD)Programmable Array Logic (PAL)Generic Array Logic (GAL)Lattice Semiconductor c. 1985Erasable and reprogrammablePAL deviceComplex Programmable Logic Device (CPLD)More gates than PALs and GALSField Programmable Gate Array (FPGA) http://www.xess.com/appnotes/fpga_tut.phpField Programmable Gate Array (FPGA)A ‘programmable’ digital logic deviceYou define the logic functions in a Hardware Descriptor Language (HDL)Compile the HDL description into a binary fileDownload the binary to the FPGA deviceVoila! You have a device that will execute your logic functionFor more information:http://www.fpga4fun.com/index.htmlSequential LogicOutput based on input values and their sequencingtiming is important!Will often use trigger signals, called ‘clock’ (Clk) signals to trigger events Flip-Flops (also known as bi-stables or latches)Devices that can store and switch between binary states, 0 and 1Fundamental building block of all semiconductor memory and processing in digital computersMade up of logic gates with feedback (some outputs are fed back to inputs of other gates)R-S Flip-FlopS stand for ‘set’R stands for ‘reset’Q and Qbar are complementary outputstprop is the ‘propagation delay time’, which is the time it takes the logic gate to change its output state following a change in the state of the input.Inputs OutputsS R Q0 0Q01 0 1 00 1 0 11 1 NA0QQRS QQNA means ‘not allowed’ RS10101010tproptproptpropTimeRSQQQQTriggering Flip-FlopsOften important to synchronize changes on a clock signalTypes of clock signals to trigger on:Level (no ‘wedge’ symbol. If no bubble, active HIGH. With bubble, active LOW)Negative edge (bubble+wedge): 1  0 transitionPositive edge (wedge): 0  1 transitionInputs Clk OutputsS RQ0 0Q01 01 00 10 11 1 NARS QClkQNA means ‘not allowed’ means activated on rising edge of clock signal (positive edge)Negative Edge-Triggered R-S Flip-FlopQ0QActive-HIGH (level triggered) R-S Flip-FlopActive-LOW (level triggered) R-S Flip-FlopOther Types of Flip-Flops - 1D Flip-Flop (ex. 7474)QClkD QPresetClearQPreset Clear D Clk Q1 1 00 11 1 11 01 1 x 0Q01 1 x 1Q00 1 x x 1 01 0 x x 0 10 0 x x NA0Q0QSingle input is stored and presented to Q on edge of clock pulse Ex. Positive edge-triggered D flip-flop Preset pulled low (“active low”) will set Q to 1 Clear pulled low (“active low”) will clear or reset Q to 0 Scherz, Practical Electronics for Inventors, p. 688Other Types of Flip-Flops - 2JK Flip-Flop (ex. 7476)QClkJ QPresetClearKQPreset Clear J K Clk Q1 1 0 0Q01 1 0 10 11 1 1 01 01 1 1 1Toggle1 1 x x 0, 1Q00 1 x x x 1 01 0 x x x 0 10 0 x x x NA0Q0QPositive edge-triggeredJK flip-flop Like RS flip-flop, where J is like S and K is like R, but can have both J and K high. This will cause output to toggle (change state) Scherz, Practical Electronics for Inventors, p. 692Sequential Logic Applications - 1Figure from Alciatore, D. G., and Histand, M. B. Introduction to Mechatronics and Measurement Systems, 2nd ed., McGraw-Hill, NY.Sequential Logic Applications - 2Figure from Alciatore, D. G., and Histand, M. B. Introduction to Mechatronics and Measurement Systems, 2nd ed., McGraw-Hill, NY.Sequential Logic Applications - 3Figure from Alciatore, D. G., and Histand, M. B. Introduction to Mechatronics and Measurement Systems, 2nd ed., McGraw-Hill, NY.Sequential Logic Applications - 4Figure from Alciatore, D. G., and Histand, M. B. Introduction to