UAH CPE 427 - Schematic Capture, DC Analysis and Transient Analysis

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1. INTRODUCTION 2. CADENCE STARTUP 3. CREATE DESIGN WORK AREA 4. CREATE INVERTER CIRCUIT 5. CREATE INVERTER SYMBOL 6. CREATE INVERTER TEST BENCH 7. SIMULATION IN SPECTRE SPICE USING THE ANALOG DESIGN ENVIRONMENT 8. POST LAYOUT SIMULATION 9. TWO-INPUT NAND GATE ANALYSIS 10. ASSIGNMENTCPE/EE 427, CPE 527, VLSI Design I: Tutorial #2, Schematic Capture, DC Analysis, Transient Analysis (Inverter, NAND2) Joel Wilder, Aleksandar Milenkovic, ECE Dept., The University of Alabama in Huntsville Adapted from San Jose State University, Dept. of Electrical Engineering Author: David W. Parent 1. INTRODUCTION In this tutorial exercise you will learn how to use Cadence’s schematic capture tool to create an inverter and then simulate it. You will build the inverter in the schematic tool at the circuit level and will construct a symbol in which to package your inverter design. Next, you will instantiate your inverter symbol into a “test workbench” file, where you will do a spice simulation using Spectre to analyze the transient and DC characteristics of your design. Subsequently, you will do a post-layout simulation that will use the inverter layout from tutorial 1, where the parasitic capacitances are extracted and incorporated into the simulation. Finally, using this workflow as a guide, you will create a two-input static NAND gate on your own and simulate it using Spectre. You will base your MOSFETs on the TSMC 0.25um 5-metal 2.5V process that was used for Tutorial 1 (MOSIS SCN5M_DEEP). 2. CADENCE STARTUP From your home directory, change directories into your cadence working directory: $ cd cadence $ cd lab1_2 Start the cadence tool: $ virtuoso& Note : The folders can be named differently, but make sure you work in the same folder as lab 1 3. CREATE DESIGN WORK AREA In the Library Manager window, select TestLib, the library you created in tutorial 1. Select the MyINV cell and add a new cell view (as was done in tutorial 1). Ensure the name of the new cell view is MyINV and make sure you select “Schematic L” in the Tool pulldown window. Click OK, and the Schematic tool will open, as shown in Figure 1.VLSI Design I, Tutorial 2 Figure 1. Schematic Capture Tool. 4. CREATE INVERTER CIRCUIT The schematic capture tool will be used to draw the schematic representation of your inverter. To draw the inverter you need to add a pmos4 transistor, nmos4 transistor, ground connection, power supply connection, input pin, output pin, and wire it together. To add items to your schematic, go to Create -> Instance in the composer tool, or press the letter ‘i’ (or select the icon pictured on the left vertical toolbar). Click on browse to graphically get components, where you will see the window as shown in Figure 3. Figure 2. Adding an instance. Page 2 of 23VLSI Design I, Tutorial 2 Figure 3. Browsing for components. To get the parts, make sure the library is set to NCSU_Analog_Parts. In the component browser window, click on supply nets and select vdd. (The items in supply nets are actually global signals, which are automatically given pins. This makes symbols cleaner because only logic ports are designated.) Stamp down the vdd instance in your schematic like in Figure 4. Figure 4. Stamping down vdd. Page 3 of 23VLSI Design I, Tutorial 2 Get the gnd symbol and stamp it down in the same manner as you did for vdd. Click on ‘Go up by 1 level’, to add the transistors, click on N_Transistors for the nmos4 and P_Transistors for the pmos4. Add an nmos4 and a pmos4 transistor in a similar manner. The pop-up for the nmos4 should look like Figure 5, and the pmos4 pop-up should look like Figure 6. Make the W/L ratio for your nmos4 4λ/2λ, and make the W/L ratio for your pmos4 8λ/2λ. (NOTE: If your transistor does not have the widths and lengths like in Figure 5, you did not attach a tech library to the library you created for tutorial 2 and you will need to start over.) Stamp them down like Figure 7. It does not have to be exact but neatness will make the design easier to work with. (If you make a mistake and need to get out of add instance mode, press the esc key. Click on the object you want to delete and press the del key.) Figure 5. Getting an nmos4 device. Page 4 of 23VLSI Design I, Tutorial 2 Figure 6. Getting a pmos4 device. Figure 7. Major symbols of the CMOS inverter. Page 5 of 23VLSI Design I, Tutorial 2 All that remains to be completed is to wire the connections together and add input and output pins. To add a wire, press w. The wire will snap to place at the proper ports of each device by pressing the ‘s’ key near that node. Wire it up like Figure 8. Figure 8. Wiring a CMOS inverter. To add the input and output pins, go to Create ->pins and a pop up like Figure 9 should appear. Fill it out exactly like Figure 9. The pin names must match the pin names of the symbol view you are going to create later. If they do not match (direction or name), the design, check & save routine will fail. Figure 9. Add pin pop-up. Stamp down the input pin like in Figure 10. Change the direction of the Y pin in the add pin pop-up to output. Stamp it down like in Figure 10. Page 6 of 23VLSI Design I, Tutorial 2 Figure 10. Completed schematic. To connect the substrate of the pmos transistor to vdd, press the esc key to get out of the add pin mode and then press w to enter the wire mode. While in wire mode connect the nmos substrate to ground as well. To save and check your schematic for errors, go to Check->Current cell view. Any errors will be highlighted in the CIW window. (The CIW window will let you know the results of the schematic check.) You can exit the schematic capture tool at this time . 5. CREATE INVERTER SYMBOL To use a test bench (test bench means a separate schematic where you will connect voltage sources and whatever else for simulating your design) you must have a symbol view of the inverter. Do not use this inverter’s schematic view as a test bench; otherwise, it will not pass LVS (LVS means layout versus schematic). To create a symbol view: 1. Go to the Library Manager window and create a new cell view in your current working library for lab2. When the window appears for creating the new cell, select the “Schematic-symbol” tool from the pulldown window and make sure the cell name is the same as the previously Page 7 of 23VLSI Design I, Tutorial 2 created inverter schematic cell. Click OK and the symbol


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UAH CPE 427 - Schematic Capture, DC Analysis and Transient Analysis

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