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CORNELL CS 3410 - Traps, Exceptions, System Calls, & Privileged Mode

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Slide 1Slide 2Control TransfersVM Hardware/Software BoundaryControl TransfersAttempt #2:Sketch of Exception HandlerSketch of Exception HandlerSketch of Exception HandlerSketch of Exception HandlerHardware/Software BoundaryDouble Faults, Triple FaultsPrecise ExceptionsPrecise ExceptionsPrecise ExceptionsSlide 16Attempt #2: RecapAttempt #2 is brokenSlide 19Operating SystemPrivilege ModePrivilege ModeTerminologySample System CallsSystem CallsInvoking System CallsLibraries and WrappersProtection BoundariesWhere does OS live?Where does OS live?Where does OS live?Slide 32Recap: TrapsExample: Clock InterruptSchedulerSyscall vs. InterruptTraps, Exceptions, System Calls, & Privileged ModeHakim WeatherspoonCS 3410, Spring 2011Computer ScienceCornell UniversityP&H Chapter 4.9, pages 509–515, appendix B.72Operating Systems3Control TransfersControl Transfers to OSCase 1: Program invokes OS•eg: sbrk(), mmap(), sleep()•Like a function call: invoke, do stuff, return resultsAttempt #1: OS as a library•Just a function call: JAL sbrk•Standard calling conventions4VM Hardware/Software BoundaryVirtual to physical address translationHardware (typical):•Traverse PageTables on TLB miss, install TLB entries•Update dirty bit in PTE when evicting•Flush when PTBR changesSoftware (typical):•Decide when to do context switches, update PTBR•Decide when to add, remove, modify PTEs and PDEs–and invoke MMU to invalidate TLB entries•Handle page faults: swap to/from disk, kill processesHardware (minimal):•Notify OS on TLB miss; software does everything else5Control TransfersControl Transfers to OSCase 1: Program invokes OS•eg: sbrk(), mmap(), sleep()•Like a function call: invoke, do stuff, return resultsCase 2: Hardware invokes OS on behalf of program•Page fault, divide by zero, arithmetic overflow, …•OS takes corrective action; then restarts/kills programCan CPU simply fake this:a0 = causeJAL exception_handler6Attempt #2:Attempt #2: OS as a library + Exception HandlerProgram invokes OS: regular calling conventionHW invokes OS: •New registers: EPC, Cause, Vector*, …•On exception, CPU does…EPC PCCause  error/reason codePC  Vector•Code at Vector does…take corrective action based on Causereturn to EPC* x86: via IDTR register and IDT; MIPS used a constant7Sketch of Exception Handler# MIPS exception vector is 0x80000180.ktext 0x80000180# EPC has offending PC, Cause has errcode# (step 1) save *everything* but $k0, $k1lui $k0, 0xB000sw $1, 0($k0)sw $2, 4($k0)sw $3, 8($k0)sw $4, 12($k0)…sw $31, 120($k0)mflo $1sw $1, 124($k0)mfhi $1sw $1, 128($k0)…* approximate8Sketch of Exception Handler# MIPS exception vector is 0x80000180.ktext 0x80000180# EPC has offending PC, Cause has errcode# (step 1) save *everything* but $k0, $k1# (step 2) set up a usable OS contextli $sp, 0xFFFFFF00li $fp, 0xFFFFFFFFli $gp, …* approximate9Sketch of Exception Handler# MIPS exception vector is 0x80000180.ktext 0x80000180# EPC has offending PC, Cause has errcode# (step 1) save *everything* but $k0, $k1# (step 2) set up a usable OS context# (step 3) examine Cause register, and take corrective actionmfc0 $t0, Cause # move-from-coprocessor-0if ($t0 == PAGE_FAULT) { mfc0 $a0, BadVAddr # another dedicated register jal kernel_handle_pagefault} else if ($t0 == PROTECTION_FAULT) { …} else if ($t0 == DIV_BY_ZERO) { …}* approximate10Sketch of Exception Handler# MIPS exception vector is 0x80000180.ktext 0x80000180# EPC has offending PC, Cause has errcode# (step 1) save *everything* but $k0, $k1# (step 2) set up a usable OS context# (step 3) examine Cause register, and take corrective action# (step 4) restore registers and return to where program left offlui $k0, 0xB000lw $1, 0($k0)lw $2, 4($k0)lw $3, 8($k0)…lw $31, 120($k0)…mfc0 $k1, EPCjr $k1* approximate11Hardware/Software BoundaryHardware Support:•registers: EPC, Cause, Vector, BadVAddr, …•instructions: mfc0, TLB flush/invalidate, cache flush, …Hardware guarantees for precise exceptions:•EPC points at offending instruction•Earlier instructions are finished•EPC and later instructions have not started•Returning to EPC will pick up where we left off12Double Faults, Triple Faults•EPC points at offending inst•Earlier inst are finished; EPC and later inst not started•Returning to EPC will pick up where we left offWhat could possibly go wrong?Exception happens during exception handler…original EPC and Cause are lost•Disable exceptions until current exception is resolved?–MIPS: Status register has a bit for enable/disable–turn exceptions back on just when returning to EPC–works for issues that can be (temporarily) ignored•Use a “double fault” exception handler for rest–BSOD•And if that faults? Triple fault  instant shutdown13Precise Exceptions•EPC points at offending inst•Earlier inst are finished; EPC and later inst not started•Returning to EPC will pick up where we left offWhat could possibly go wrong?Multiple simultaneous exceptions in pipelinelw $4, 0($0) # page faultxxx $4, $5, $5 # illegal instructionadd $2, $2, $3 # overflow•need stalls to let earlier inst raise exception first•even worse with speculative / “out-of-order” execution14Precise Exceptions•EPC points at offending inst•Earlier inst are finished; EPC and later inst not started•Returning to EPC will pick up where we left offWhat could possibly go wrong?Exception happened in delay slotjal printslw $4, 0($0) # page fault…•need more than just EPC to identify “where we left off”15Precise Exceptions•EPC points at offending inst•Earlier inst are finished; EPC and later inst not started•Returning to EPC will pick up where we left offWhat could possibly go wrong?Instructions with multiple faults or side effectsstore-and-update-registermemory-to-memory-copymemory-fill, x86 “string” prefix, x86 “loop” prefix•need more than just EPC to identify “where we left off”•or: try to undo effects that have already happened•or: have software try to finish the partially finished EPC•or: all of the above16“The interaction between branch delay slots and exception handling is extremely unpleasant and you'll be happier if you don't think about it.”– Matt Welch17Attempt #2: RecapAttempt #2: RecapProgram invokes OS•regular calling conventionHW invokes OS: •precise exceptions vector to OS exception handlerDrawbacks?18Attempt #2 is brokenDrawbacks:•Any program can muck with TLB, PageTables, OS


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