Name: 1CSE 240 Autumn 2004DUE: Mon. 11 October 2004Intro. to Computer Architecture Homework 4Write your answers on these pages. Additional pages may be attached (with staple) if necessary. Please ensure thatyour answers are legible. Please show your work. Due at the beginning of class. Total points: 60.1. [6 Points] Instruction Encoding. Suppose a machine encodes instructions in 32-bits according to the followingformat. Assume there are 290 opcodes and 60 registers.OPCODE DR SR1 SR2 UNUSED(a) What is the minimum number of bits required to represent the OPCODE field?(b) What is the minimum number of bits required to represent each of the register fields (e.g., DR)?(c) What is the maximum number of bits left available for the UNUSED field and how many values could itencode?2. [12 Points] LC-3 Instruction Encoding. For these questions assume the LC-3 instruction encoding (inside theback cover of your textbook). You may also need to consult Appendix A.(a) What is the range of values (in decimal) that may be specified by the immediate field in an AND instruc-tion?2(b) What is the range of values (in decimal) that may be specified by the PCoffset field in a BR instruction?(c) What is the range of values (in decimal) that may be specified by the offset field in an LDR instruction?(d) What is the relationship between JMP and RET? In particular, why do they have the same bits in theopcode field?(e) Give the encoding of two LC-3 instructions that together increment register R3 by 20. Complete thefollowing table.Address 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Instructionx3001x3002Name: 33. [14 Points] LC-3. Suppose you want to execute the program made up of the instructions in the final column offollowing table.Address 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Instructionx3001 R2 <- M[R1+0]x3002 R3 <- M[R1+1]x3003 BRzp x3006x3004 R3 <- NOT R3x3005 R3 <- R3 + 1x3006 R2 <- R2 + R3x3007 M[R1+2] <- R2(a) Give the binary encoding of each instruction in the table. Write your answers in the table, above.(b) Trace the execution of the above program, starting at x3001, by completing the following table. Give thePC and instruction to execute in the first two columns, and give the state of the registers and conditioncodes after the execution of that instruction (leave an entry blank if it has not been changed by theinstruction). The initial register state and the effect of the first instruction are given in the first two rows.Assume memory locations x3100 and x3101 contain 2 and -3, respectively.PC Instruction R0 R1 R2 R3 R4 R5 R6 R7 CCsinitial register state ⇒ 0 x3100 0 3 4 5 6 7x3001 R2 <- M[R1+0] 2 P(c) In a sentence, what does this code compute?44. [16 Points] LC-3. The following (bit-level) memory contents represent an LC-3 program.Address 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Instructionx3001 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 R1 <- M[R0+0]x3002 0 1 0 1 0 1 0 0 1 0 1 0 0 0 0 0x3003 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 1x3004 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 1x3005 0 0 0 1 0 1 1 0 1 1 1 1 1 1 1 1x3006 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 1x3007 0 1 1 1 0 1 0 0 0 0 0 0 0 0 1 0(a) First, determine what each instruction does. Write this next to each instruction (above) in a manner similarto that of the previous problem.(b) Next, trace the execution of the above program, starting at x3001, by completing the following table. Givethe PC and instruction to execute in the first two columns, and give the state of the registers and conditioncodes after the execution of that instruction (leave an entry blank if it has not been changed by theinstruction). The initial register state and the effect of the first instruction are given in the first two rows.Assume memory locations x3100 and x3101 contain 3 and 2, respectively.PC Instruction R0 R1 R2 R3 R4 R5 R6 R7 CCsinitial register state ⇒ x3100 1 2 3 4 5 6 7x3001 R1 <- M[R0+0] 3 PName: 5(c) Describe what this code does, assuming execution starts at address x3001. What registers or memory serveas input to this code? And what registers or memory serve as output? Be very careful in determining theinput and output (i.e., just because a register appears in the code does not mean that it is input or output).(d) Under what circumstances will this program fail to perform its principal task?5. [6 Points] Instruction Processing. The PC, IR, MAR, MDR, and RF (register file) are structures written invarious phases of the instruction processing cycle, depending on the opcode of the particular instruction beingexecuted. In each cell in the table below, enter the opcodes that write to each structure (row) during the cor-responding phase (column) of the instruction processing cycle. To make this simpler, let’s only consider thefollowing opcodes: AND, LDR, STR, and JMP.FETCH DECODE EVAL ADDR FETCH OPERANDS EXECUTE STOREPCIRMARMDRRF66. [6 Points] LC-3 Implementation. Consider the logic diagram below showing part of the control structure of anLC-3 machine. N, Z, and P are condition codes.(a) What does the output of the NOR gate tell us?(b) What does the output of the OR gate tell us?(c) What is the purpose of the signal labeled A?Name: 77. [No Points] Last and Most Important Question! Please give us your feedback!(a) How many hours did you spend on this assignment?(b) On a scale of 1-5, how difficult did you find this assignment? (1-easiest, 5- most difficult)(c) Do you have any other comments on your experience completing this assignment? What are