Copyright 1995 D. Hanson, K. Li & J.P. Singh Computer Science 217: Computer Organizations Page 132 October 12, 1997 Computer Organizations RegistersALUFPUControlUnitCentral Processing Unit (CPU)CacheMemoryDisplayEthernetDiskPrinter AdapterMBusI/O BusCopyright 1995 D. Hanson, K. Li & J.P. Singh Computer Science 217: Storage Hierarchy Page 133 October 12, 1997 Storage Hierarchy • Registers fastest storage (as fast as CPU cycle time), but often very few (<128) • Caches “small” but faster than main memory with 1 to 3 levels (1K-4Mbytes) • Memory fairly fast (200ns) and quite large (1-1000Mbytes)an array of cells made of dynamic random-access memory (DRAM)each cell is usually a byte and has an address most machines operate most efficiently on one data type called a word words are typically composed of several cells, e.g., 4 bytes in 1 wordAddress size may be unrelated to the amount of allowable memory • Disk long latency (10ms to find a block), but large (200M-10Gbytes) • Tape Very long latency (seconds to find a block), very low-cost and large (Gbytes)Copyright 1995 D. Hanson, K. Li & J.P. Singh Computer Science 217: Compilation to Machine Code Page 134 October 12, 1997 Compilation to Machine Code • Compiler: Source code Assembly language code x = a + b; ld a, %r1ld b, %r2add %r1, %r2, %r3st %r3, x • Assembler converts each assembly lang. instruction into a bit pattern that hardware understandsthese bit patterns constitute machine codeCopyright 1995 D. Hanson, K. Li & J.P. Singh Computer Science 217: Machine Language Page 135 October 12, 1997 Machine Language • Machine language is the bit patterns that specify CPU instructions • Understanding machine languages helps build intuition about the cost of high-level functionalitylearn about low-level operating system support;understand how operating systems implement securityunderstand what compilers do and how to implement code generatorsunderstand procedure call mechanismslearn how to write very fast code, when — and only when — it’s necessarydesign a better instruction set and faster processorCopyright 1995 D. Hanson, K. Li & J.P. Singh Computer Science 217: Instruction Formats Page 136 October 12, 1997 Instruction Formats • Instructions are composed of opcode — specifies function to be performed operands — data that is operated on • Most machines have only a few formats • Typical 0, 1, 2, 3-operand instruction format: opcodeopcode dstopcode src dstopcode src1 src2 dstCopyright 1995 D. Hanson, K. Li & J.P. Singh Computer Science 217: Instruction Execution Page 137 October 12, 1997 Instruction Execution • CPU’s algorithm for executing a program: PC <- memory location of the 1st instructionwhile ( PC != lastInstructionLocation ) {execute ( MEM[ PC ];}; • Each machine instruction has several phases Fetch -- Instruction fetch, increment PCDecode -- Instruction decodeOperand Fetch -- Fetch registersExecute --Instruction executionStore -- Store
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