6.111 Fall 2007 Lecture 14, Slide 1Lab 4 overviewac97ac97-commandsaudioSerial linksto/from AC97chiprecorder(your job!)ready8864K x 8 BRAMwe88Addr 16ENTER button(push to record)lab3.vAssignment: build a voice recorder that recordsand plays back 8-bit PCM data @ 6KHzAbout 11 seconds of speech @ 6KHz6.111 Fall 2007 Lecture 14, Slide 2AC97: PCM dataSlot 0 (16) Slot 1 (20) Slot 20 (20)……AC97_SYNCHREADYSlot 2 (20)256 bits @ 12.288Mhz = 48kHz frame rateSlot 3 (20)Frame infocommands LDataready selects a particular clock_27mhz clock edge when youshould store input data from the AC97 (from_ac97_data) andprovide new output to the AC97 (to_ac97_data).PCM = pulse code modulationSample waveform at 48kHz,encode results as an N-bitsigned number. For our AC97chip, N = 18.Slot 4 (20)RDataFPGA sends output frame to AC97 while AC97 sends input frame to FPGA6.111 Fall 2007 Lecture 14, Slide 36.111 Final Project6.111 Fall 2007 Lecture 14, Slide 4Final Project: Schedule• Choose project teams (email cjt by Oct.22)– Teams of two (or maybe three). A single person projectrequires approval of lecturer.• Project Abstract (due Oct. 29, submit on-line)– Start discussing ideas now with 6.111 staff– About 1 page long, clearly identify who’s doing what• Proposal Conference with staff mentor (by Nov. 2)– Bring your proposal with you and submit on-line• Block Diagram Conference with mentor (by Nov. 9)– Review major components and overall design approach– Specify the device components you need to acquire (smallbudget allocated for each project if component does notexist in the stock room). Get approval from the 6.111staff and your TA will contact John Sweeney to obtainthe parts.6.111 Fall 2007 Lecture 14, Slide 5Schedule (cont’d.)• Project Design Presentation to staff (Nov 13 – 15)– Each group will make a 15 min electronic presentation(~10 slides) dividing presentation among team members– Submit PDF on-line, will be posted on website– Example: S2004 FROGGER presentation slides• Project Checkoff Checklist to staff (Nov 16)– Each group in discussion with TA creates a checklist ofdeliverables (i.e., what we can expect each team memberto demonstrate). Submit PDF on-line.• Final Project Presentations (Dec 10 - 12)– Videotaped and posted on-line with your permission• Final Project Report (Dec 12, 5p)– Submit PDF on-line, will be posted on website– Sorry, no late checkoffs or reports will be accepted6.111 Fall 2007 Lecture 14, Slide 6Team Organization• Most importantly, you need one• Key decisions made jointly– Requirements– High level design– Schedule– Who will work on what, who’ll take the lead– Response to slippage• Lower level design exchanged for examination– Everyone responsible for everything– Design reviews tremendously helpful• Try it, you’ll like it• Communicate with each other early and often6.111 Fall 2007 Lecture 14, Slide 7Controlling Schedule• First, you must have one• Need verifiable milestones• Some non-verifiablemilestones– 90% of coding done,90% of debuggingdone, Design complete• Need 100% events– Module 100% coded,Unit testing complete• Need critical path chart– Know effects ofslippage– Know what to work onwhen35% Planning(not all up front)15% Coding25% moduletest/dubug25% systemtest/debugProvide a 4-7 day contingencyto deal with unforeseen issues(you’ll use it all!)6.111 Fall 2007 Lecture 14, Slide 8Choosing A Topic• You only have 6 weeks total (once your proposal abstract isturned in) to do this project.– It is important to complete your project.– It is very difficult to receive an “A” in the class withouthaving something working for the final project.• The complexity for each team member should greater than thecomplexity of the lab assignments.• Some projects include analog building blocks or mechanicalassemblies (infrared, wireless, motors, etc.). However, keep inmind that this is a digital design class and your design will beevaluated on its digital design aspects.• Complexity, risk and innovation factor.– We will give credit to innovative applications, design approaches– More complex is not necessarily better• Look through previous projects for inspiration (see website)6.111 Fall 2007 Lecture 14, Slide 9Example ProjectsMusic TranscriberRoberto Carli, Alessandro YamhureFall 2005Virtual JugglingDavid Rush, Christopher WilkensFall 20056.111 Fall 2007 Lecture 14, Slide 10Some Suggestions• Be ambitious!– But choose a sequence of milestones that are increasinglyambitious (that way at least part of your project willwork and you can debug features incrementally).– But don’t expect 400Mhz operating frequencies, etc.• It’s motivating if there’s something to see or hear– Video and graphics projects are fun (and with the labkitbasic video input and output are pretty straightforwardwhich means you can concentrate on the processing)– Audio/Music is low-bandwidth, so it’s easy to dointeresting processing in real-time (real-time is harderwith video).• Memories are often the limiting factor– Figure out how you’ll use memory blocks early-on6.111 Fall 2007 Lecture 14, Slide 11More Suggestions• Be modular!– Figure out how test your modules incrementally (good fordebugging and checkoff!)– Be clear about what information is passed betweenmodules (format, timing)• Don’t be caught by the mañana principle– Six weeks goes by quickly: have a weekly task list.– How does a project run late: one day at a time!– Effort is not the same as progress: “Written but nottested” only means you’ve made a start– Tasks will take longer than you think– Final integration will uncover bugs/thinkos so test module-to-module interactions as earlier as you can6.111 Fall 2007 Lecture 14, Slide 12Grading (40 points Total)• Report and Presentation (10 points)• Problem Definition and Relevance, Architecture,Design methodology (10 points)– What is the problem– Why is it important– System architecture and partitioning– Design choices and principles used– Style of coding– All of the above should be stated in the project andreport• Functionality (10 points)– Did you complete what your promised (i.e., graded bythe checklist)• Complexity, Innovation, Risk (10 points)6.111 Fall 2007 Lecture 14, Slide 13Design Rules• Use hierarchical design– Partition your design into small subsystems that are easierto design and test.– Design each
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