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Rose-Hulman
CSSE 332 -
Introduction to Multithreading
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Introduction to Multithreading, Superthreading and Hyperthreading by Jon "Hannibal" Stokes http://www.arstechnica.com/paedia/h/hyperthreading/hyperthreading-1.htmlIntroduction to Multithreading, Superthreading and Hyperthreading by Jon "Hannibal" Stokes http://www.arstechnica.com/paedia/h/hyperthreading/hyperthreading-1.html Replicated • Register renaming logic • Instruction Pointer • ITLB • Return stack predictor • Various other architectural registers Partitioned • Re-order buffers (ROBs) • Load/Store buffers • Various queues, like the scheduling queues, uop queue, etc. Shared • Caches: trace cache, L1, L2, L3 • Microarchitectural registers • Execution
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