Lecture #34Poly-Si Gate DepletionMOS Band Diagram with Gate DepletionGate Depletion EffectExample: GDESlide 6Inversion-Layer Thickness TinvEffective Oxide Thickness, ToxeEffective Oxide Capacitance, CoxeVT Adjustment by Ion ImplantationEE130 Lecture 34, Slide 1Spring 2007Lecture #34OUTLINE The MOS Capacitor:•MOS non-idealities (cont.)•VT adjustmentReading: Chapter 18.3EE130 Lecture 34, Slide 2Spring 2007•A heavily doped film of polycrystalline silicon (poly-Si) is typically employed as the gate-electrode material in modern MOS devices.–There are practical limits to the electrically active dopant concentration (usually less than 1x1020 cm-3)The gate must be considered as a semiconductor, rather than a metalPoly-Si Gate Depletion P-type SiN+ poly-Sin-type SiP+ poly-SiNMOS PMOSEE130 Lecture 34, Slide 3Spring 2007)(TpolyGoxinvVVVCQ How can gate depletion be minimized?MOS Band Diagram with Gate DepletionVG is effectively reduced:EcEFSEvEvqVGqSWTP-type SiN+ poly-Si gateEcqVpolyWpolySi biased to inversion:polypolySipolyqNVW2EE130 Lecture 34, Slide 4Spring 2007N+ poly-SiGauss’s Law dictates polyoxoxpolyqNW /E)3/( 112211polyoSiOSipolySiOopolyoxWxWxCCCGate Depletion Effectxo is effectively increased: )3/()(2polyoSiOTGinvWxVVQp-type Si------+ + + + + +N++ +-- -CpolyCoxEE130 Lecture 34, Slide 5Spring 2007Example: GDEVox , the voltage across a 2 nm thin oxide, is 1 V. The n+poly-Si gate active dopant concentration Npoly is 8 1019 cm-3 and the Si substrate doping concentration NA is 1017cm-3. Find (a) Wpoly , (b) Vpoly , and (c) VT .Solution:(a)nm 3.1cm108C106.1cm102V 1)F/cm(1085.89.3//31919714polyooxoxpolyoxoxpolyqNxVqNWEEE130 Lecture 34, Slide 6Spring 2007(b) polypolySipolyqNVW2V 11.02/2SipolypolypolyWqNV(c)V 97.0V 11.0V 1V 84.0V 98.0V 98.0ln2 2TiAGFBpolyoxFFBTVnNqkTqEVVVVVIs the loss of 0.11V significant?EE130 Lecture 34, Slide 7Spring 2007The average inversion-layer location below the Si/SiO2 interface is called the inversion-layer thickness, Tinv . Electron DensityQuantummechanical theoryÅInversion-Layer Thickness Tinv-50 -40 -30 -20 -10 0 10 20 30 40 50SiSiO2poly-Si gateEE130 Lecture 34, Slide 8Spring 200733invpolyooxeTWxT at VG=Vdd(VG + VT)/Toxe can be shown to be the average electric field in the inversion layer. Tinv of holes is larger than that of electrons because of the difference in effective masses.Effective Oxide Thickness, ToxeEE130 Lecture 34, Slide 9Spring 20073/3/invpolyooxTWxT )()(TGoxeTGoxeoxinvVVCVVTQ C Basic LF C-Vwith gate-depletionwith gate-depletion and charge-layer thicknessVG dataCoxEffective Oxide Capacitance, CoxeEE130 Lecture 34, Slide 10Spring 2007VT Adjustment by Ion Implantation•In modern IC fabrication processes, the threshold voltages of MOS transistors are adjusted by ion implantation:–A relatively small dose NI (units: ions/cm2) of dopant atoms is implanted into the near-surface region of the semiconductor–When the MOS device is biased in depletion or inversion, the implanted dopants add to the dopant-ion charge near the oxide-semiconductor interface.oxITCqNV atomsacceptor for 0atomsdonor for
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