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SJSU EE 166 - Hamming_Presentation

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Hamming Code Circuit (Detection)AgendaWhat is Hamming Code?Block DiagramSpecifications:Longest Path CalculationsSchematicLayoutVerificationSlide 10SimulationSlide 12Cost AnalysisSummaryConclusion/Lessons LearnedAcknowledgements /References1Hamming Code Circuit(Detection)Mike RaCaroline ChoiThuy NguyenChristopher GobokAdvisor: Dave ParentMay 11, 20052Agenda•Introduction to Hamming Code•Project Specifications•Project Details (Schematic, Layout, etc.)•Cost Analysis•Conclusion/Lessons Learned3What is Hamming Code?•Error detection scheme•Utilizes multiple parity bits to generate a “codeword” that corresponds to the error bit. (Consistent with other error correction and detection schemes, where there is an increase in overhead).•Correction is possible through hardware or software4Block Diagram4743ENCODERDECODER5Specifications:•Encoder:•input – 4 data bits•output – 7 data bits• Circuit Specs:• Clock Frequency : 200Mhz• Supply Voltage : 5 V • Load Capacitance : 30fF•Decoder:•input – 7 data bits•output – 4 data bits & 3 codeword bits6Longest Path CalculationsNote: All widths are in micronsand capacitances in fFPHL= PLH = (5ns)/(14LL) = 0.35ns7Schematic8Layout9Verification10Verification11Simulation12Simulation13Cost Analysis# of hours spentVerifying logic 12Verifying timing 25Layout 40Post extracted timing 3 ------------------ Total = 80 hours@ a rate of $150/hr, this project would have cost $12,000!14Summary• Complete Circuit:• Clock Frequency : 315 Mhz• Area : 289.95 x 151.5 microns• Power : 3.78 mW• Load Capacitance : 30 fF15Conclusion/Lessons Learned•Start Early•Expose yourself to the tool before starting•Layout – Design in blocks (cell based) and then instantiate them to minimize error•Test at every different phase•Ask other students with experience for help16Acknowledgements /References•Thanks to Dr. Parent•Thanks to John (Dr. Parents T.A.)•Fellow Students•Ando, Hisashige & Fujibu Ltd. F4 Microprocessor Design Forum. “Robust Design Solutions for Nano-scale Circuits. 2005•Rowan University. “Electronics II – VLSI Design” Lab 6 – The Design and Layout of an Encoder/Decoder that Simulates the Hamming Error Correcting Code. http://users.rowan.edu/~head/spring05/vlsi/ ADK_HAMMING_Lab6_S05.doc•Unv. Of New Brunswick. “EE4253 Digital Communications”.Error Correction and the Hamming Code. http://www.ee.unb.ca//tervo/ee4253/hamming.htm.


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