Lecture #39Sub-Threshold Leakage CurrentSub-Threshold Slope SHow to minimize S?MOSFET ScalingBenefit of Transistor ScalingCircuit Example – CMOS InverterSlide 8Constant-Field ScalingConstant-Field Scaling (cont.)VT Design Trade-OffSlide 12Generalized ScalingCMOS Scaling and the Power CrisisEE130 Lecture 39, Slide 1Spring 2007Lecture #39OUTLINEThe MOSFET:•Sub-threshold leakage current•Gate-length scalingEE130 Lecture 39, Slide 2Spring 2007Sub-Threshold Leakage Current• We had previously assumed that there is no channel current when VGS < VT. This is incorrect.• If S > F, there is some inversion charge at the surface, which gives rise to sub-threshold current flowing between the source and drain:)1()1(//)(2kTqVmkTVVqoxeeffDSDSTGeeqkTmLWCIEE130 Lecture 39, Slide 3Spring 2007Sub-Threshold Slope S)1)(10(ln )(log110oxedmGSDSCCqkTdVIdSEE130 Lecture 39, Slide 4Spring 2007How to minimize S?EE130 Lecture 39, Slide 5Spring 2007MOSFET Scaling•MOSFETs have scaled in size over time–1970’s: ~ 10 m–Today: ~50 nm•Reasons:–Speed–DensityEE130 Lecture 39, Slide 6Spring 2007–IDS as L (decreased effective “R”)–Gate area as L (decreased load “C”)–Therefore, RC (implies faster switch)Benefit of Transistor ScalingEE130 Lecture 39, Slide 7Spring 2007C CV1 V2 V3 Vd dVd d 0V2V1tV32d....................... (a) (b)delaynpropagatio:dCircuit Example – CMOS InverterEE130 Lecture 39, Slide 8Spring 2007dsatNdddsatPdddIC Vdelayd ownp ullICVd elayu pp ulld ela yuppulld elayd ownpull22)(21)11(4dsatPdsatNdddIICV)|(|22andddgdsatddonddPNVVIVIVRRd is reduced by increasing IDsatEE130 Lecture 39, Slide 9Spring 2007Constant-Field Scaling•Voltages and MOSFET dimensions are scaled by the same factor >1, so that the electric field remains unchangedEE130 Lecture 39, Slide 10Spring 2007Constant-Field Scaling (cont.)• Circuit speed improves by • Power dissipation per function is reduced by 2EE130 Lecture 39, Slide 11Spring 2007VT Design Trade-Off•Low VT is desirable for high ON current:IDsat (VDD - VT) 1 < < 2•But high VT is needed for low OFF current:VT cannot be scaled aggressively!Low VTHigh VTIOFF,high VTIOFF,low VTVGSlog IDS0EE130 Lecture 39, Slide 12Spring 2007•Since VT cannot be scaled down aggressively, the power-supply voltage (VDD) has not been scaled down in proportion to the MOSFET channel lengthEE130 Lecture 39, Slide 13Spring 2007Generalized Scaling•Electric field intensity increases by a factor >1•Nbody must be scaled up by to control short-channel effects• Reliability and power density are issuesEE130 Lecture 39, Slide 14Spring 2007CMOS Scaling and the Power Crisis1E-051E-041E-031E-021E-011E+001E+011E+021E+030.01 0.1 1Gate Length (μm)Power (W/cm2)Passive Power DensityActive Power DensityLg/VDD/VT trends increases in:• Active Power Density (VDD2) ~1.3X/generation• Passive Power Density (VDD) ~3X/generation• Gate Leakage Power Density >4X/generationSource: B. Meyerson, IBM, Semico Conf., January
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