1ECE 274 - Digital LogicLecture 11 Lecture 11 – Datapath Components Incrementer Counters Multiplier2CountersN-bit up-counter: N-bit register that can increment (add 1) to its own value on each clock cycle 0000, 0001, 0010, 0011, ...., 1110, 1111, 0000 Note how count “rolls over” from 1111 to 0000 Terminal (last) count, tc, equals1 during value just before rollover Internal design Register, incrementer, and N-input AND gate to detect terminal count4.6cnttc C4-bit up-counter400000100010010001101000101...11100111110 00000001ld4-bit registerCtc4444cnt4-bit up-counter+1aa3Incrementer Counter design used incrementer Incrementer design Could use carry-ripple adder with B input set to 00...001 But when adding 00...001 to another number, the leading 0’s obviously don’t need to be considered -- so just two bits being added per column Use half-adders (adds two bits) rather than full-adders (adds three bits)0 0 1 10 1 11+carries:unused00001(a)(b)a3 a2 a1 a0 1s0s1s2s3coabco sHAabco sHAabco sHAabco sHAIrnta3co s3s2+1s1s0a2 a1 a04Incrementer Can build faster incrementerusing combinational logic design process Capture truth table Derive equation for each output c0 = a3a2a1a0 ... s0 = a0’ Results in small and fast circuit Note: works for small N --larger N leads to exponential growth, like for N-bit adders20001111000011110s10110011001100110s01010101010101010s30000000111111110c00000000000000001a00101010101010101a10011001100110011a30000000011111111Inputs Outputsa200001111000011115Design ChallengeNot Really a Quiz Design a 2-bit decrementer. 6Counter Example: Mode in Above-Mirror Display Recall above-mirror display example from Chapter 2 Assumed component that incremented xy input each time button pressed: 00, 01, 10, 11, 00, 01, 10, 11, 00, ... Can use 2-bit up-counter Assumes mode=1 for just one clock cycle during each button press Recall “Button press synchronizer” example from Chapter 3cnttc c1c0xy2-bit upcountermodeclk7Counter Example: 1 Hz Pulse Generator Using 256 Hz Oscillator Suppose have 256 Hz oscillator, but want 1 Hz pulse 1 Hz is 1 pulse per second -- useful for keeping time Design using 8-bit up-counter, use tc output as pulse Counts from 0 to 255 (256 counts), so pulses tcevery 256 cyclescnttc C(unused)8-bit up-counter1osc(256 Hz)8p(1 Hz)8Down-Counter 4-bit down-counter 1111, 1110, 1101, 1100, …, 0011, 0010, 0001, 0000, 1111, … Terminal count is 0000 Use NOR gate to detect Need decrementer (-1) –design like designed incrementerld4-bit registerCtc4444cnt4-bit down-counter–19Up/Down-Counter Can count either up or down Includes both incrementer and decrementer Use dir input to select, using 2x1: dir=0 means up Likewise, dir selects appropriate terminal count valueld4-bit registerCtc444444cntclrclrdir4-bit up/down counter44–1 +1102x1104-bit 2x110Counter Example: Light Sequencer Illuminate 8 lights from right to left, one at a time, one per second Use 3-bit up-counter to counter from 0 to 7 Use 3x8 decoder to illuminate appropriate light Note: Used 3-bitcounter with 3x8 decoderNOTan 8-bitcounter – why not?lights0 0 00 0 10 1 03-bit up-countercnttc c2 c1 c03x8 dcd i2 i1 i0unused1clk(1 Hz)d7 d6 d5 d4 d3 d2 d1 d0a11Counter with Parallel Load Up-counter that can be loaded with external value Designed using 2x1 mux– ld input selects incremented value or external value Load the internal register when loading external value or when countingld4-bit registerCtc444cntld+1104-bit 2x1L4412Counter with Parallel Load Useful to create pulses at specific multiples of clock Not just at N-bit counter’s natural wrap-around of 2N Example: Pulse every 9 clock cycles Use 4-bit down-counter with parallel load Set parallel load input to 8 (1000) Use terminal count to reload When count reaches 0, next cycle loads 8. Why load 8 and not 9? Because 0 is included in count sequence:  8, 7, 6, 5, 4, 3, 2, 1, 0 Æ 9 countscntldtc CL1clk4410004-bit down-counter13Counter Example: New Year’s Eve Countdown Display Chapter 2 example previously used microprocessor to counter from 59 down to 0 in binary Can use 8-bit (or 7- or 6-bit) down-counter instead, initially loaded with 59d0i0i1i2i3i4i5c0c1c2c3c4c5c6c7tcd1d2d3d58d59d60d61d62d636x64dcd8-bitdown-counter598Lldcntclk(1 Hz)resetfireworksHappyNewYear01235859countdown14Counter Example: 1 Hz Pulse Generator from 60 Hz Clock U.S. electricity standard uses 60 Hz signal Device may convert that to 1 Hz signal to count seconds Use 6-bit up-counter Can count from 0 to 63 Create simple logic to detect 59 (for 60 counts) Use to clear the counter back to 0 (or to load 0)Ctcp1osc(60 Hz)(1 Hz)clrcnt6-bit up counter15Timer A type of counter used to measure time If we know the counter’s clock frequency and the count, we know the time that’s been counted Example: Compute car’s speed using two sensors First sensor (a) clears and starts timer Second sensor (b) stops timer Assuming clock of 1kHz, timer output represents time to travel between sensors. Knowing the distance, we can compute speed16Multiplier – Array Style Can build multiplier that mimics multiplication by hand Notice that multiplying multiplicand by 1 is same as ANDing with 14.717Multiplier – Array Style Generalized representation of multiplication by hand18Multiplier – Array Style Multiplier design – array of AND gatesABP*Block symbol+ (5-bit)+ (6-bit)+ (7-bit)000000a0a1a2a3b0b1b2b30p7..p0pp1pp2pp3pp419Design Challenge Design Challenge Design a 4-bit up-counter with an additional output upper. upper outputs a 1 whenever the counter is within the upper half of thecounter’s range, 8 to 15. Due:  Next Lecture (Friday, October 14) Extra Credit (Homework) 2