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1Analysis of Jitter due toPower-Supply Noise inPhase-Locked LoopsPayam Heydari, Massoud PedramDepartment of EE-Systems, University of Southern California,Los Angeles, CA 90089OUTLINE• INTRODUCTION• PLL NOISE SOURCES• POWER SUPPLY NOISE• VCO PHASE NOISE & PLL TIMING JITTER• EXPERIMENTAL RESULTS• CONCLUSION2INTRODUCTION• PLLs are ubiquitous in RF and mixed signal circuits• The phase-lock concept is fundamental in anysituation where some form of feedback is used tosynchronize some local periodic event with someobservable external event• Most high-speed microprocessors and memoriesemploy phase locking to suppress timing skewsPLL APPLICATIONS• Clock and data recovery• Clock generation for microprocessors• Frequency synthesis• Demodulation of FM signals• Coherent demodulation of AM signals• Local oscillator design for cellular phones, cablemodems, and radios3PLL DESIGN SPECIFICATIONS! Cycle-to-cycle jitter:1TT∆+2TT ∆+• Lock range• Capture range• Acquisition time• Jitter• The PLL timing jitter can cause serious problems in asystem which uses the PLL1ΦCLKVinVoutChldVouttVin,PRIOR WORK• Oscillator phase noise due to the device noise– Using an LTI feedback system approach to analyzethe phase noise (Razavi, JSSC’96)– Using an LTV model and stochastic differentialequations to analyze the phase noise (Hajimiri,JSSC’98)(Demir, DAC’98)• Oscillator jitter due to power supply noise– Using a deterministic frequency modulation model(Hertzel, CICC’98)4NOISE SOURCES IN PLLKDfpd(.)L(n)[vLP] =L(m)[vPD]KD∫t(.)M÷InputPhase DetectorLow-pass FilterVCOFrequencyDividerVCO phase noiseInput noise0111)(...bdtdbdtdbLmmmmmmm+++=−−−0111)(...adtdadtdaLnnnnnnn+++=−−−POWER SUPPLY NOISEImpulsive noiseSinusoidal noiseTcTcWp/Lp=38/0.25Wn/Ln=25/0.25Cdecoup= 0.5pFWp/Lp=38/0.25Wn/Ln=25/0.25Cdecoup= 100pF5MODELING THE SINUSOIDAL NOISE• When a large decoupling capacitor is present in thecircuit, the supply noise is modeled as a sinusoidalwaveform with a random maximum amplitude and auniformly distributed random phase shift in[−π , π])sin(][)(0max,θω+=tkVtvnn• vn(t) is a wide-sense stationary process, therefore:0=nvη)(cos}][{)(0max,2τωτrnvtkVERn=...,2,1,0=k)(][max,max,kTVknn=TktkT)1( +≤≤MODELING THE IMPULSIVE NOISEPLLlpwr1lpwr2lpwr3lgnd1lgnd2lgnd3G1G2GN....tVclkt∆VnVn,max[1]Vn,max[2]Vn,max[3]SmalldecouplingcapacitanceGndGdtt,1,... ≠≠τ[1].trτ[2].trτ[3].tr).][(][)(0max,rknntkTkttrpzkVtvτ−=∑∞=wheretrpz(t)ttr1Vn,max[k]andτ[k] are independent stochastic processes.TktkT )1(+≤≤6• The pulse width of the supply noise is very smallcompared to the clock periodVclk ,t∆Vnτ[1]τ[2]τ[3]• When a small decoupling capacitor is present in thecircuit, the power supply noise is modeled as animpulse train with a uniformly-distributed random shiftin [0 , tr] and normally distributed random amplitudeVclk ,∆Vnt)()(λ−= tstvnwhere()∑∞=−=0max,][)(knTktkVtsδMODELING THE IMPULSIVE NOISE• s(t) is a wide-sense cyclo-stationary stochasticprocessTheorem:If s(t) is a cyclo-stationary process and λ is a uniformlydistributed random variable in the interval [0 , tr] andindependent of s(t), then the process:vn(t) = s(t-λ)is a stationary process with the following statistics:∫=rsrvtdtttn0)(1ηη∫+=rsrvtdtttRtRn0),(1)(ττ2)()(1)(max,ωωδωXeStSjVrvnn=}][{max,kVEnvn=η)()(max,2τδστrVnvtRn=rVnvtSnmax,2)(σω=MODELING THE IMPULSIVE NOISE7PHASE NOISE OF THE VCO• A VCO implemented as a five-stage fully differentialring oscillator exhibits good current-frequencylinearityV0V1V2V3V4())(.2)(1tvrCkWVNCCkWtfnDSoxsatrefeqoxsat+=∆υυ• The VCO excess frequency is calculated as:Using BSIM3v3 MOS modelPHASE NOISE OF THE VCO• The phase noise of the VCO is:==Φ)()(22ωωωnVVCOSKSnrVVCOtKn222max,.σω()()()nnVCOKωωδωωδωπ−++.222Impulsive noiseSinusoidal noise• The autocorrelation of ∆ f (t) is a linear function of theautocorrelation of vn)()(2ττnvVCOfRKR =∆8TIMING JITTER OF THE VCO• The timing jitter of the VCO is the standard deviationof the timing uncertainty:()=ΦΦ=− )()0(22222τπστnnRRfclockrVclockVCOtfKnτσπmax,22222())(cos12222τωπnclockVCOfK−Impulsive noiseSinusoidal noisePLL TIMING JITTER)()()(20ωωωnSHSPLLΦΦ=• Assume that the loop filter is narrowband. Hence thePLL transfer function exhibits a dominant pole)()/()(1)/(1)(20ωωωnSKRKMjRKSPFDVCOPFDΦΦ+=sp1sp2szMKKRsPFDVCOp−=29PLL TIMING JITTER (cont’d)())exp(12)(222max,220τστsptspKKjitterrVnPFDVCO−−=Φ())cos(11.2)(222max,22240τωωσωτnnrVnnVCOsptMKjitter −+=ΦImpulsive noiseSinusoidal noisePHASE-FREQUENCY DETECTOR• Does not suffer from false lock• The input signal and the VCO output are exactly in phase• The lock is attained very quicklyDataCLKUPRESETDOWN10CHARGE-PUMP CIRCUIT• The zero introduced by the resistor causes a smooth and non-oscillatory transition.• The glitch produced by the voltage drop across resistor isdampened by a 0.2pF capacitorPFDDinCLKinUPDOWNMPC13pF10K0.2pF500MSPMSNMPC2MPC3MNC1MNC2VOLTAGE-CONTROLLED OSCILLATORThe wide-swing cascode current tail:1. increases the Power-Supply Rejection Ratio (PSRR)2. protects the VCO frequency from the supply variationsVrefAvFrom Bandgap ReferenceReplica biasingMPd17MPd18MPd16MPd15MPd12MNd16MNd18MNd17MNd15MNd11MNd12MNd13MNd14MPd11MPd1211DESIGNOF BANDGAP REFERENCE• The circuit generates a fixed 0.8V• It exhibits 0.88% variation in response to atemperature variation of 10-130°C and 0.37%variation in response to a supply variation of 1.8-3.2V……R1N=150R3R2R430.51K7.54K30.51K21.7Kµµ25.02.4µµ25.02.4µµ25.02.4EXPERIMENTAL SETUPPLL3nH0.1pF0.513nH0.05pF0.1pF0.05pF13nH0.53nH0.1pF10.5nH1nH10.05pFCdecoupling10pFOneoffiveoutputdriverstages-121.8-119.7100-116.2-115.680-114.3-112.464-111.4-11040-111.2-109.332.3-103-100.315.7-97.5-96.49.1-93.4-92.25.3Simulation [dB/Hz]Phase noise [dB/Hz]AnalyticalFrequency offset(kHz)12CONCLUSION• A mathematical model for calculating the power supplynoise induced timing jitter in PLLs was presented• The model relies on the stochastic modeling of thepower supply noise• The effect of the power supply noise on the phasenoise of the VCO was analyzed and expressed inclosed form• The PLL timing jitter was determined using the phasenoise of the VCO• A PLL was designed and our mathematical model wasutilized to


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