MSU ECE 3724 - Motherboard Chipsets (11 pages)

Previewing pages 1, 2, 3, 4 of 11 page document View the full content.
View Full Document

Motherboard Chipsets



Previewing pages 1, 2, 3, 4 of actual document.

View the full content.
View Full Document
View Full Document

Motherboard Chipsets

84 views

Other


Pages:
11
School:
Mississippi State University
Course:
Ece 3724 - Microprocessors is an undergraduate course in Electrical and Computer Engineering at Mississippi State University
Microprocessors is an undergraduate course in Electrical and Computer Engineering at Mississippi State University Documents

Unformatted text preview:

Bob Reese 7 24 00 Motherboard Chipsets Provided by CPU manufacturer Intel AMD etc Provide integration of several common functions Cache Controller PCI Bus Interface Dram Controller Bridges to other busses ISA USB etc Used to be provided by third party vendors but these could not keep up with complexity of new CPUs also hard to make time to market goals 7 24 00 1 Typical PCI Based x86 Computer Architecture L3 Cache AGP L2 Cache SDRAM L1 Cache x86 CPU Common Package System Bus 64 bit PCI Adapter 1 PCI Adapter 2 North Bridge PCI Adapter 3 PCI Adapter 4 PCI Bus 32 bit USB Root Hub 1 EIDE 1 EIDE 2 XD Bus 8 bit Flash Mem BIOS 7 24 00 DRAM RTC and CMOS South Bridge USB Root Hub 2 KBD PS 2 LPT UART1 UART2 Floppy ISA Bus 16 bit ISA Adapter 1 ISA Adapter 2 2 1 Bob Reese 7 24 00 AMD Motherboard Note that communication between chips in chipset is via PCI bus 7 24 00 3 Pentium II Motherboard with Intel 440LX Chipset Note that communication between chips in chipset is via PCI bus 7 24 00 DRAM 4 2 Bob Reese 7 24 00 7 24 00 5 INTEL 820 Chipset for Pentium III 7 24 00 DRAM 6 3 Bob Reese 7 24 00 Two processors supported Winmodem support Hub architecture Dedicated comm link between two chips of chipset 7 24 00 7 I82802 Firmware Hub Optional component for all 810 and above chipsets 4 or 8 Mbits of flash memory for non volatile storage can be used by BIOS Contains a Random number generator based on thermal noise 7 24 00 DRAM Actual RNG instead of psuedo RNG can increase security of encryption algorithms 8 4 Bob Reese 7 24 00 Low Pin Count LPC interface Intended to be new interface between legacy devices ISA X bus and chipset Devices that interface with chipset thru LPC interface SuperIO devices Keyboard Serial Port parallel port Floppy Disk Controller Generic memory BIOS Uses PCI 33 Mhz clock Goal is a PC without either X Bus or ISA 7 24 00 9 Intel 815E Chipset Intended for low cost to midstream PCs 3D graphics controller low performance based on i740 3D graphics chip integrated on



View Full Document

Access the best Study Guides, Lecture Notes and Practice Exams

Loading Unlocking...
Login

Join to view Motherboard Chipsets and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Motherboard Chipsets and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?