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Maximum Information Storage System Concept Implementation and Application Xin Li Electrical Computer Engineering Department Carnegie Mellon University 5000 Forbes Avenue Pittsburgh PA 15213 USA xinli ece cmu edu In this paper we propose a completely new design methodology referred to as Maximum Information Storage System MISS for SRAM circuits The key idea is not to maximize the traditional cell density that is measured by the number of SRAM cells per unit area Instead we propose to maximize the information density i e the number of information bits per unit area Note that these two density metrics are equivalent if and only if all SRAM cells have zero failure probability In this case one SRAM cell stores one bit of information However as each SRAM cell can possibly fail with nanoscale manufacturing technology the proposed information density is substantially different from the traditional cell density It offers a radically new paradigm for optimal SRAM design The proposed information density measures the amount of information stored in a unit area SRAM system Maximuminformation storage cannot be achieved by simply maximizing cell robustness Note that a reduced failure rate of SRAM cell always comes with an area penalty e g by increasing transistor size or by adding extra redundancy If SRAM cells are overdesigned to achieve nearly zero failure probability only few bit cells hence only few information bits can be stored within a unit area It in turn fails to offer maximum information storage In many application specific cases zero failure probability is not required As will be demonstrated by the signal processing examples in Section 6 a number of unimportant SRAM cells can fail to work and they have negligible impact on the final signal to noise ratio On the other hand continually increasing the number of SRAM cells within a unit area does not lead to maximuminformation storage either If an SRAM cell is designed with small size transistors it results in a high

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