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Low-Power Silicon Spiking Neurons and Axons



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Low Power Silicon Spiking Neurons and Axons John Lazzaro CS Division UC Berkeley Berkeley CA 94720 Abstract Cf This paper presents low power versions of two circuits often used in analog VLSI models of neural systems The circuits model the spiking behavior of the axon hillock and the pulse propagation of axons 1 Ii Vc Vo C Introduction As device dimensions decrease die sizes increase and wafer scale techniques mature power consumption becomes a dominant issue in VLSI system design A silicon neural design style that operates MOS transistors in the weak inversion regime 7 1 supports low power VLSI design In this design style popular circuits that model continuous time dendritic processing operate all transistors in the weak inversion regime In contrast several popular circuits in this design style that model the spiking behavior of the axon hillock and the pulse propagation of axons operate several transistors outside the weak inversion regime In many neural implementations these axon circuits dominate power consumption 3 4 5 6 2 I have designed fabricated and tested versions of these axon circuits in these modified circuits all transistors operate in the weak inversion regime The modified circuits are fully functional and show a measured improvement in power consumption over the original circuits Power consumption decreases of a factor of 10 to 1000 have been measured depending on pulse width and spiking frequency The density of the modified circuits is comparable to the original circuits The modified axon hillock circuit adds one transistor to the original circuit the modified model of axonal pulse propagation adds one transistor to each stage of delay of the original circuit The modified circuits also add two control voltages to the original circuits judicious use of a process with two layers of polysilicon allows the addition of these wires with a minimal increase in density Vp Ii 5 nA Vo 5V 5 ms Figure 1 Spiking neuron circuit and function with unidirectional



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