A Comparative Study of Dynamic Voltage Scaling Techniquesfor Low-Power Video DecodingEriko Nurvitadhi and Ben LeeSchool of Electrical Engineeringand Computer ScienceOregon State University{nurviter, benl}@eecs.orst.eduChansu YuDepartment of Electrical andComputer EngineeringCleveland State [email protected] KimSchool of EngineeringInformation and CommunicationsUniversityTaejon, [email protected] paper presents a comparison of power-awarevideo decoding techniques that utilize Dynamic VoltageScaling (DVS) capability. Three techniques were simu-lated and compared in terms of power consumption, accu-racy, and deadline misses. The simulation results showthat the dynamic per-frame technique, where the decodingtime prediction adapts to the particular video being de-coded, is the most promising approach due to its feasibil-ity of implementation and comparable performance to theideal case. Our findings also indicate that in general, asthe number of available processor settings increases, theamount of power saving increases, but the number ofdeadline misses increases as well. More importantly,most of these deadline misses are within 10-20% of theplayout interval and thus insignificant. However, videoclips with high variability in frame complexities combinedwith inaccurate decoding time predictions may degradethe video quality. Finally, our results show that a proces-sor with 13 voltage/frequency settings is sufficient toachieve near maximum performance with the experimen-tal environment and the video workloads we have used.Keywords: Dynamic voltage scaling, video decoding, low-power techniques, decoding time prediction.1. IntroductionPower efficient design is one of the most importantgoals for mobile devices, such as PDAs, handhelds, andmobile phones. As the popularity of multimedia applica-tions for these portable devices increases, reducing theirpower consumption will become increasingly important.Among multimedia applications, delivering video willbecome the most challenging and important applicationsof future mobile devices. Video conferencing and multi-media broadcasting are already becoming more common,especially in conjunction with the Third Generation (3G)wireless network initiative [8]. However, video decodingis a computationally intensive, power ravenous process.In addition, due to different frame types and variationbetween scenes, there is a great degree of variance inprocessing requirements during execution. This highvariability in video streams can be exploited to reducepower consumption of the processor during video de-coding.Dynamic Voltage Scaling (DVS) has been shown totake advantage of the high variability in processing re-quirements by varying the processor’s operating voltageand frequency during run time [4, 7]. In particular, DVSis suitable for eliminating idle times during low work-load periods. Recently, researchers have attempted toapply DVS to video decoding to reduce power [9, 10, 12,13]. These studies present approaches that predict thedecoding times of incoming frames or Group of Pictures(GOPs), and reduce or increase the processor settingbased on this prediction. As a result, idle processingtime, which occurs when a specific frame decodingcompletes earlier than its playout time, is minimized.Even if decoding time prediction is very accurate, themaximum DVS performance can be achieved only if theprocessor can scale to very precise processor settings.Unfortunately, such a processor design is impracticalsince there is cost associated with having different proc-essor supply voltages. Moreover, the granularity ofvoltage/frequency settings induces a tradeoff betweenpower savings and deadline misses. For example, thefine-grain processor settings may even increase thenumber of deadline misses when it is used with an inac-curate decoding time predictor. Coarse-grain processorsettings, on the other hand, lead to overestimation byhaving voltage and frequency set a bit higher than re-quired. This reduces deadline misses in spite of predic-tion errors, but at the cost of reduced power savings.Therefore, the impact of available processor settings onvideo decoding with DVS needs to be further investi-gated.Based on the aforementioned discussion, this paperprovides a comparative study of the existing DVS tech-niques developed for low-power video decoding, such asGOP [12] and Direct [10, 13], with respect to predictionaccuracy and the corresponding impact on performance.In addition, an alternative method called Dynamic is pro-posed as an improvement to these techniques. The Dy-namic approach is designed to perform well even withhigh-motion videos by dynamically adapting its predic-tion model based on the decoding experience of the par-ticular video clip being played. An extensive simulationstudy based on SimpleScalar processor model [5], Wattchpower tool [3] and Berkeley MPEG Player [2] has beenconducted to compare these DVS approaches. We inves-tigated two important tradeoffs: The impact of decodingtime predictions and granularity of processor settings onDVS performance in terms of power savings, playoutaccuracy, and characteristics of deadline misses.The rest of the paper is organized as follows. Section2 presents existing DVS techniques on low-power videodecoding and their decoding time predictors. Section 3discusses the simulation environment and presents thesimulation results on how the accuracy of decoding timepredictor and the granularity of processor settings affectDVS performance. Finally, Section 4 provides a conclu-sion and elaborates on future work.2. Prediction-based DVS ApproachesPrediction algorithms employed in several DVS ap-proaches differ based on the following two criteria: Pre-diction interval and prediction mechanism. Predictioninterval refers to how often predictions are made andprocessor settings are changed. The existing approachesuse either per-frame or per-GOP scaling. Predictionmechanism refers to the way the decoding time of an in-coming frame or GOP is estimated. Currently, all theapproaches utilize some form of frame size