2008 Military & Aerospace Programmable Logic Devices (MAPLD) Conference, Sept. 15-18, 2008, Annapolis, MD.Page 1A Power-Efficient Design Approach to Radiation Hardened Digital Circuitryusing Dynamically Selectable Triple Modulo RedundancyBrock J. LaMeres and Clint GauerDepartment of Electrical and Computer EngineeringMontana State UniversityBozeman, MT 59717 USAAbstract- Triple Modulo Redundancy (TMR) isone of the most common techniques for faultmitigation in digital systems. TMR-basedcomputing has a natural application to missioncritical systems for military and aerospaceapplications which are exposed to cosmic radiationand are susceptible to Single Event Upsets (SEUs).TMR’s increased immunity to SEUs comes at theexpense of increased power consumption and area.This paper presents a dynamically selectable TMRarchitecture which can be used to reduce powerconsumption when radiation levels are low. Weapply this architecture to a test system in order toevaluate its power reduction and area overheadcompared to a traditional static TMR approach. Weshow that the dynamically selectable TMR can beadopted with only a 2.2% increase in equivalentgate count compared to the traditional static TMRwhen implemented on a Xilinx Virtex-4 FPGA.This approach yields as much as a 67% reduction inpower consumption versus a traditional static TMRapproach when radiation levels are low.I. INTRODUCTIONRecently, there has been an increasedinterest in the radiation immunity of digitalcircuitry for use in aerospace and militaryapplications [1,2]. This renewed interest comesas a result of two main factors. The first is thewidening gap between the performance ofcommercial off-the-shelf (COTS) integratedcircuits and those that are fabricated with theability to withstand the radiation levels of anextraterrestrial environment [3]. The secondreason is that the number of foundries providingradiation hardened (RadHard) processes isdiminishing due to a reduction in post cold warDepartment of Defense funding.As scientists and engineers re-approach theproblem of radiation immunity in digital circuits,there are a new set of constraints andopportunities that are present that must beaddressed. First, creating an infrastructure offoundries that are capable of producing aRadiation Hardened processes is economicallyinfeasible due to the low volume nature of themilitary/aerospace applications. Further, thesecurity issues surrounding themilitary/aerospace applications prevent theoutsourcing of fabrication to lower labor costregions of the globe [1,2,3]. This economicconstraint is mandating that approaches toradiation tolerance be developed that usedomestic CMOS processing capability. Thisallows the solutions to scale with the advancesbeing made in fabrication technology while stillmaintaining economic feasibility. While thispresents a new constraint on solutions, it alsoopens up an opportunity to exploit the circuitdensity available in modern CMOS processes.One logical approach that has been adoptedas a formidable solution to radiation tolerance ofSingle Event Transients (SETs) and SingleEvent Upsets (SEUs) is Triple ModuloRedundancy (TMR) [4,5,6,7]. TMR is anapproach where 3 identical circuits are used foreach logic operation. The outputs of the 3identical logic circuits are fed into a votingsystem which produces an output based on themajority of values. This technique assumes thata radiation particle will only strike the diffusionregion of one of the circuits creating an SEU.Since the other two circuits in this approach areunaffected, the voting system will disregard theinconsistent result of the effected circuit andproduce the correct output. This approach hasbeen proven and implemented in modern FPGAs[8].Figure 1. Example Circuit without Radiation Tolerance2008 Military & Aerospace Programmable Logic Devices (MAPLD) Conference, Sept. 15-18, 2008, Annapolis, MD.Page 2Figure 2. Example Circuit with Radiation Tolerance using StaticTriple Modulo Redundancy (TMR)The drawback of this approach is theincreased area and power consumptionassociated with having three redundant circuitsand the additional voting hardware. While theincrease in area is not necessarily a problem dueto the high density of modern processes, thepower consumption of extra circuitry is adetrimental issues to satellite and missionspacecraft running on portable power cells [1,2].In this paper, we present novel solution toradiation tolerance based on the TMR approachin order to reduce overall power. In ourapproach, we propose a dynamically selectableTMR circuit that is under the control of a built incurrent sensor (BICS) [6] that detects whenradiation is present. Under normal operation(i.e., no radiation detected), the TMR circuitry isdisconnected from the main logic path, thusconsuming no extra power from the system.When the BICS detects radiation, the TMRcircuitry is enabled and redundancy checking isperformed. This approach allows the averagepower of the system to be reduced by not usingTMR checking when the circuit resides in aradiation free environment. This approach usesslightly more area than a straight TMRapproach; however, the power consumption isreduced considerably. This type of logicalsolution is ideal for implementation in COTSFPGAs. Figure 3 shows the architecture of thedynamic TMR approach. We apply thisapproach to an 8-bit counter design to evaluatethe implementation details, the area impact, andpower consumption. We use VHDL to describethe system and implement the design on a XilinxVirtex-4 FPGA in order to evaluate the area andpower consumption of our approach.Figure 3. Example Circuit with Radiation Tolerance using LowPower, Dynamic Triple Modulo RedundancyII. DESIGN APPROACHOur system is based on the existence of anexternal radiation sensor which can detect whenradiation is present and will produce a controlsignal for the dynamic TMR system [6]. Thissignal is used by the dynamic TMR system toknow when to switch between standardoperation and TMR. The signal is assumed tobe high for multiple system clock cycles so thatit can be used as a synchronous control input.Under normal operation (no radiation), thesystem only uses one of the three redundantcircuits. The outputs of this active circuit (#1)are used as the final outputs of the system. TheTMR voting machine is not used in this case.The other two redundant circuits (#2 & #3) aredisabled. By disabling the two redundantcircuits and the TMR voting machine,
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