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SJSU EE 124 - Syllabus

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Electronic Design II, EE124 Fall 2011 page 1 San José State University Department of Electrical Engineering EE124, Electronic Design II Number 41329, Section 01, Fall 2011 Coordinator: Prof. Hamedi-Hagh Instructor: Prof. Hamedi-Hagh Office Location: ENGR381 Phone: (408) 924-4041 Email: [email protected] Office Hours: Tuesdays 13:30 to 16:00 and Wednesdays 10:15 to 12:00 or by appointment Class Schedule: Mondays/Wednesdays 9:00-10:15 Classroom: ENGR345 Prerequisites: EE122, EE128 and Engr100W with grades of C or better Course Description Analysis and design of Analog integrated circuits using Bipolar and CMOS transistors. Topics in-clude current sources, active loads, differential amplifiers, frequency response, frequency compensa-tion, output stages, feedback amplifiers and operational amplifiers. Course Goals and Student Learning Objectives This course teaches design of fundamental building blocks for Analog integrated circuits. It begins with analysis and design of current sources and active loads using Bipolar and CMOS transistors. Design of single-stage and differential-pair amplifiers with their frequency response is introduced. Impact of feedback on input and output resistances as well as voltage and current gains is analyzed. Design of output stages and operational amplifiers are discussed. Frequency compensation and pow-er-bandwidth optimization in amplifiers are also studied. GE/SJSU Studies Learning Outcomes (LO), if applicable Upon successful completion of this course, students will be able to: LO1: Demonstrate an understanding of the fundamentals of Electrical Engineering, including its mathematical and scientific principles, analysis and design. LO2: Demonstrate the ability to apply the practice of Engineering in real-world problems. Course Content Learning Outcomes Upon successful completion of this course, students will be able to: LO3: Apply the knowledge of mathematics, science, and engineering in circuit analysis (3.a) LO4: Analyze and design integrated amplifier circuits to meet desired needs (3.c) LO5: Identify, formulate, and solve engineering problems in Analog circuit design (3.e) LO6: Demonstrate to use the techniques, skills, and modern engineering tools necessary for engineering practice (3.k) ABET outcomesElectronic Design II, EE124 Fall 2011 page 2 The letters in parentheses in the course learning objectives refer to ABET criterion 3 outcomes sa-tisfied by the course. These are listed below as a reference: (a) An ability to apply knowledge of mathematics, science, and engineering (b) An ability to design and conduct experiments, as well as to analyze and interpret data (c) An ability to design a system, component, or process to meet desired needs (d) An ability to function on multi-disciplinary teams (e) An ability to identify, formulate, and solve engineering problems (f) An understanding of professional and ethical responsibility (g) An ability to communicate effectively (h) The broad education necessary to understand the impact of engineering solutions in a global and societal context (i) A recognition of the need for, and an ability to engage in life-long learning (j) A knowledge of contemporary issues (k) An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice (l) Specialization in one or more technical specialties that meet the needs of companies (m) Knowledge of probability and statistics, including applications to electrical engineering (n) Knowledge of advanced mathematics, including differential and integral equations, linear algebra, complex variables, and discrete mathematics (o) Basic sciences, computer science, and engineering sciences necessary to analyze and design complex electrical and electronic devices, software, and systems containing hardware and software components Required Textbook: • Microelectronic Circuits, 6th Edition, by Sedra and Smith, Oxford University Press, 2010 Other Reading for Reference Only: • Analysis and Design of Analog Integrated Circuits, 5th Edition, by Gray, Hurst, Lewis and Meyer, Wiley, 2009 Classroom Protocol Students are expected to participate actively in class. Students will turn their cell phones off or put them on vibrate mode while in class. They will not answer their phones in class. Dropping and Adding Students are responsible for understanding the policies and procedures about add/drops, academic renewal, etc. Students should be aware of the current deadlines and penalties for adding and dropping classes. Information on add/drops are available at http://info.sjsu.edu/web-dbgen/narr/soc-fall/rec-298.html. Information on late drop is at http://www.sjsu.edu/sac/advising/latedrops/policy . Projects and Homework: Problem solution is essential for student’s success in this course and the textbook problems are all designed to better prepare students for examinations. Textbook provides answers to some chapter questions. It is highly recommended that students solve as many questions as possible and verify their answers during office hours. A number of projects will be assigned to the students in the laboratory part of this course, where a student will design, simulate, build, and test an electronic circuit, write a final report on the project and give a presentation. For more detail refer to EE124 Laboratory Manual.Electronic Design II, EE124 Fall 2011 page 3 Exams and Grading Policy There will be two midterm exams and a final exam. Exams are closed book. Students are allowed to bring a calculator and a page of formula. Final exam will be comprehensive. There will be no make-up exams (unless under a very special circumstance and when both written excuse and official proofs are provided). Exam solutions will be discussed in the class after the midterm exams. Grades Midterm Exam 1 20% Midterm Exam 2 20% Final exam 35% Laboratory 25% Grading Percentage Breakdown 90% and above A 89% - 85% A- 84% - 82% B+ 81% - 79% B 78% - 75% B- 74% - 72% C+ 71% - 69% C 68% - 65% C- 64% - 62% D+ 61% - 59% D 58% - 55% D- below 55% F University Policy in Academic integrity Students should know that the University’s Academic Integrity Policy is availabe at http://www.sa.sjsu.edu/download/judicial_affairs/Academic_Integrity_Policy_S07-2.pdf. Your own commitment to learning, as evidenced by your enrollment at San Jose State University and the


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