1Electrical and Computer EngineeringUAHCPE/EE 422/522 Introduction toIntroduction toXilinx VirtexXilinx VirtexFieldField--Programmable Programmable Gate Arrays DevicesGate Arrays DevicesDr. Rhonda Kay GaedeElectrical and Computer EngineeringPage 2 of 30UAH CPE/EE 422/522Xilinx FPGAsOutline• Introduction• Field-Programmable Gate Arrays•Virtex• Virtex-E, Virtex-II, and Virtex-II Pro2Electrical and Computer EngineeringPage 3 of 30UAH CPE/EE 422/522Xilinx FPGAsThe World of Application Specific The World of Application Specific Integrated Circuit DesignIntegrated Circuit DesignMask-Programmable User ProgrammableCustomApplication Specific Integrated Circuit DesignElectrical and Computer EngineeringPage 4 of 30UAH CPE/EE 422/522Xilinx FPGAsSelecting a TechnologySelecting a TechnologyHigh PerformanceLow Cost (High Volume)Power ConsumptionNon-Recurring-Engineering CostCustomProgrammableHigh Development CostsPretty Good PerformanceHigher CostReconfigurableNo Non-Recurring-Engineering CostLow Development Costs3Electrical and Computer EngineeringPage 5 of 30UAH CPE/EE 422/522Xilinx FPGAsWhat is an FPGA?What is an FPGA?ReconfigurableBlack-Box HardwareElectrical and Computer EngineeringPage 6 of 30UAH CPE/EE 422/522Xilinx FPGAsWhat are What are FPGAsFPGAsmade of?made of?• FPGA: Field-Programmable Gate Arrays Basic blocks of logic function (CLBs) Programmable input/output blocks (IOBs) Programmable interconnections  Embedded memory (bRAMs)• Type of interconnections network Anti-fuse SRAM4Electrical and Computer EngineeringPage 7 of 30UAH CPE/EE 422/522Xilinx FPGAsBasic Layout of an FPGABasic Layout of an FPGAInput/Output BlocksLogic Basic BlocksEmbeddedMemoryElectrical and Computer EngineeringPage 8 of 30UAH CPE/EE 422/522Xilinx FPGAsXilinxXilinxVirtexVirtex2.5V FPGA (1)2.5V FPGA (1)• Densities from 50k to 1M system gates • System performance up to 200 MHz• Four dedicated delay-locked loops (DLLs) for advanced clock control• Dedicated carry logic for high-speed arithmetic• Look-up-table based architecture• IEEE 1149.1 boundary-scan logic• SRAM-based in-system configurable• Unlimited re-programmability• 0.22 µm 5-layer metal process• Number of user I/O pins range from 94 to 5125Electrical and Computer EngineeringPage 9 of 30UAH CPE/EE 422/522Xilinx FPGAsXilinxXilinxVirtexVirtex2.5V FPGA (2)2.5V FPGA (2)Electrical and Computer EngineeringPage 10 of 30UAH CPE/EE 422/522Xilinx FPGAsXilinxXilinxVirtexVirtex2.5V FPGA (3)2.5V FPGA (3)6Electrical and Computer EngineeringPage 11 of 30UAH CPE/EE 422/522Xilinx FPGAsCLB: Configurable Logic Block (1)CLB: Configurable Logic Block (1)• The Logic Cell (LC) is the basic building block of the VirtexCLB• LC includes 4-input function generator carry logic storage element•CLB = 4 LCsElectrical and Computer EngineeringPage 12 of 30UAH CPE/EE 422/522Xilinx FPGAsVirtexVirtexSliceSlice7Electrical and Computer EngineeringPage 13 of 30UAH CPE/EE 422/522Xilinx FPGAsLUT: Look Up TableLUT: Look Up Table• Basic building blocks of a logic function• Virtex contains 4-input LUT• Capacity limited by number of input• Configures as LUT, ROM, and RAMLUTX1X2X3X4ZX1 X2 X3 X4Z0 0 0 0 00 0 0 1 10 0 1 0 10 0 1 1 10 1 0 0 00 1 0 1 10 1 1 0 10 1 1 1 11 0 0 0 01 0 0 1 11 0 1 0 11 0 1 1 11 1 0 0 11 1 0 1 11 1 1 0 11 1 1 1 11 1 1 1 1Example:Z = X1X2 + X3 + X4Electrical and Computer EngineeringPage 14 of 30UAH CPE/EE 422/522Xilinx FPGAsIOB: Input/Output BlockIOB: Input/Output Block• Interface between pins and CLBs• Supports wide variety of I/O signalling standards8Electrical and Computer EngineeringPage 15 of 30UAH CPE/EE 422/522Xilinx FPGAsInputInputElectrical and Computer EngineeringPage 16 of 30UAH CPE/EE 422/522Xilinx FPGAsOutputOutput9Electrical and Computer EngineeringPage 17 of 30UAH CPE/EE 422/522Xilinx FPGAsCompatible Output StandardsCompatible Output StandardsElectrical and Computer EngineeringPage 18 of 30UAH CPE/EE 422/522Xilinx FPGAsEmbedded MemoryEmbedded Memory•Two Types Block RAM  Block SelectRAM10Electrical and Computer EngineeringPage 19 of 30UAH CPE/EE 422/522Xilinx FPGAsProgrammable Routing Matrix (1)Programmable Routing Matrix (1)• Quality of routing controls the speed of a design• Local Routing:  CLB feedback paths Chains horizontal CLBs togetherElectrical and Computer EngineeringPage 20 of 30UAH CPE/EE 422/522Xilinx FPGAsProgrammable Routing Matrix (2)Programmable Routing Matrix (2)• General Routing General Routing Matrix (GRM) Horizontal and vertical routing resources 24 single-length lines in each of the four directions 12 longlines (horizontal and vertical) • VersaRing: interface between the CLBs and IOBs – pin-swapping and pin-locking• Global Routing: 4 dedicated global nets with dedicated input pins that are designed to distribute high-fanout clock signals with minimal skew• Delay-Locked Loop: eliminate skew between the clock input pad and internal clock-input pins throughout the device11Electrical and Computer EngineeringPage 21 of 30UAH CPE/EE 422/522Xilinx FPGAsProgrammable Routing Matrix (3)Programmable Routing Matrix (3)Electrical and Computer EngineeringPage 22 of 30UAH CPE/EE 422/522Xilinx FPGAsDirection of TechnologyDirection of Technology•?12Electrical and Computer EngineeringPage 23 of 30UAH CPE/EE 422/522Xilinx FPGAsDevice Release DatesDevice Release Dates• Virtex, November 1998• Virtex-E, December 1999• Virtex-II, November 2000• Virtex-II Pro, January 2002Electrical and Computer EngineeringPage 24 of 30UAH CPE/EE 422/522Xilinx FPGAsVirtexVirtex--EE13Electrical and Computer EngineeringPage 25 of 30UAH CPE/EE 422/522Xilinx FPGAsVirtexVirtex--EEElectrical and Computer EngineeringPage 26 of 30UAH CPE/EE 422/522Xilinx FPGAsVirtexVirtex--IIII14Electrical and Computer EngineeringPage 27 of 30UAH CPE/EE 422/522Xilinx FPGAsVirtexVirtex--IIIIElectrical and Computer EngineeringPage 28 of 30UAH CPE/EE 422/522Xilinx FPGAsVirtexVirtex--II ProII Pro15Electrical and Computer EngineeringPage 29 of 30UAH CPE/EE 422/522Xilinx FPGAsVirtexVirtex--II ProII ProElectrical and Computer EngineeringPage 30 of 30UAH CPE/EE 422/522Xilinx FPGAsProblems and ChallengesProblems and ChallengesHow to best utilize this pre-fabricated