Midterm 3 Revision and Parallel ComputersSolution to problem 1Slide 4Slide 5Slide 6Slide 7Solution to problem 4Slide 9Slide 10Slide 11Slide 12Uniprocessor SystemsSlide 14Slide 15Slide 16MultiprocessorsSlide 18Slide 19Slide 20Slide 21MultiProcessorsSlide 23Slide 24Slide 25Slide 26Applications of Parallel Computers1966 Flynn’s ClassificationSlide 29Multiprocessor Systems Flynn’s ClassificationWhy Multiprocessors?Parallel Processing IntroMajor MIMD StylesSlide 34Slide 35Slide 36Slide 37Slide 38Slide 39Slide 40Slide 41Slide 42Slide 43Multiprocessor SystemsSlide 45Multiprocessor Systems System TopologiesSlide 47Slide 48Slide 49Slide 50Slide 51Slide 52Slide 53Slide 54Slide 55Slide 56Slide 57Slide 58Slide 59Slide 60Slide 61Slide 62Slide 63Slide 64Architecture DetailsSlide 66Slide 67Slide 68Slide 69Parallel ComputersCluster ComputersSlide 72Slide 73Slide 74Slide 75Slide 76Slide 77Supercomputers in ChinaSlide 79Slide 80Slide 81Slide 82Slide 83Slide 84Slide 85Slide 86Slide 87Slide 88Tianhe-1A : China’s New Supercomputer, Beats Cray XT5 Jaguar of USSlide 90Slide 91Linux operating systemSlide 93Luckily the Tianhe-1A canMidterm 3 Revision and Midterm 3 Revision and Parallel ComputersParallel ComputersProf. Sin-Min LeeProf. Sin-Min LeeDepartment of Computer Department of Computer ScienceScienceSolution to Quiz 6 problems 1 and 4.Solution to Quiz 6 problems 1 and 4.Draw By: Alice CottiDraw By: Alice CottiThanks!Thanks!Solution to problem 1Solution to problem 1XXTT11TT00QQ11QQ00QQ11++QQ00++000000000011001100001111110000110011111100111111Step 1: Create a table with a column for all the input values, and for the output values Q1+ and Q0+Step 2: Start by entering all the possible values for the inputs: X, Q0 and Q1IMAGESolution to problem 1Solution to problem 1XXTT11TT00QQ11QQ00QQ11++QQ00++0000000000110011001111000011111111110000111100111100110011111111Step 3: By following the circuit diagram we cantell that T1 is equal to Q1 X + Q0 . Fill in the T1 column according to the boolean expression. IMAGE+IMAGEIMAGESolution to problem 1Solution to problem 1XXTT11TT00QQ11QQ00QQ11++QQ00++00001100000011110011001111110000111111111111110000111111001111001111001111111111Step 4: By looking at the image, realize thatT0 is always 1 Set it to 1 everywhere.IMAGEIMAGEIMAGESolution to problem 1Solution to problem 1XXTT11TT00QQ11QQ00QQ11++QQ00++000011000000001111001111001111110000001111111100111111000011111111001111110011110011111111111100Step 5: Q1+ is next state of T1 (toggle) flip-flop.Value in Q1 column is current state of Flip-flop. T1 column is the input. Using this information, fill in the values for the Q1+ column. Draw a T Flip-Flop truth table if needed. IMAGEIMAGEIMAGESolution to problem 1Solution to problem 1XXTT11TT00QQ11QQ00QQ11++QQ00++0000110000001100111100111100001111110000110011111111000011111100001111111111001111001100111100111111111111110000Step 6: Q0+ is next state of T0 (toggle) flip-flop.Value in Q0 column is current state of Flip-flop. T0 column is the input. Using this information, fill in the values for the Q0+ column. Draw a T Flip-Flop truth table if needed. IMAGEIMAGEIMAGESolution to problem 4Solution to problem 4clkJKClearQ0Solution to problem 4Solution to problem 4clkJKClearQ0010ClearClearJKJKQQ0000XXXX00110000QQ1101010011101011111111QQ1 10000110Because Clearis zero, Q0 is also zero [J and K doesn't matter]Since Clear is 1, look for J and K.In this case they both are zero so Q0 also stays zeroBecause Clearis zero, Q0 is also zero [J and K doesn't matter]Uniprocessor SystemsUniprocessor SystemsImprove performance:Improve performance:Allowing multiple, simultaneous memory Allowing multiple, simultaneous memory accessaccess- requires multiple address, data, and control buses - requires multiple address, data, and control buses (one set for each simultaneous memory access)(one set for each simultaneous memory access)- The memory chip has to be able to handle multiple- The memory chip has to be able to handle multiple transfers simultaneouslytransfers simultaneouslyUniprocessor SystemsUniprocessor SystemsMultiport Memory:Multiport Memory:Has two sets of address, data, and control pins to Has two sets of address, data, and control pins to allow simultaneous data transfers to occurallow simultaneous data transfers to occurCPU and DMA controller can transfer data CPU and DMA controller can transfer data concurrentlyconcurrentlyA system with more than one CPU could handle A system with more than one CPU could handle simultaneous requests from two different simultaneous requests from two different processorsprocessorsUniprocessor SystemsUniprocessor SystemsMultiport Memory (cont.):Multiport Memory (cont.):CanCan- Multiport memory can handle two requests to read Multiport memory can handle two requests to read data from the same location at the same timedata from the same location at the same timeCannotCannot- Process two simultaneous requests to write data to Process two simultaneous requests to write data to the same memory locationthe same memory location- Requests to read from and write to the same - Requests to read from and write to the same memory location simultaneouslymemory location simultaneouslyMultiprocessorsMultiprocessorsI/O PortDeviceDeviceControllerCPUBusMemoryCPUCPUMultiprocessorsMultiprocessorsSystems designed to have 2 to 8 CPUsSystems designed to have 2 to 8 CPUsThe CPUs all share the other parts of the The CPUs all share the other parts of the computercomputerMemoryMemoryDiskDiskSystem BusSystem BusetcetcCPUs communicate via Memory and the CPUs communicate via Memory and the System Bus System BusMultiProcessorsMultiProcessorsEach CPU shares memory, disks, etcEach CPU shares memory, disks, etcCheaper than clustersCheaper than clustersNot as good performance as clustersNot as good performance as clustersOften used forOften used forSmall ServersSmall ServersHigh-end WorkstationsHigh-end WorkstationsMultiProcessorsMultiProcessorsOS automatically shares work among OS automatically shares work among available CPUsavailable CPUsOn a workstation…On a workstation…One CPU can be running an engineering One CPU can be running an engineering design programdesign programAnother CPU can be doing complex graphics Another CPU can be doing complex graphics formattingformattingApplications of Parallel Applications of Parallel ComputersComputersTraditionally: government labs, Traditionally: government labs,
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