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U of I CS 241 - Lecture 18

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CS241 System Programming Input/Output IContentAdministrativeOverviewPrinciples of I/O HardwareDevicesDevice-Computer/Device-Device CommunicationDevice ControllerI/O ControllerI/O PortsMemory-Mapped I/O (1)Memory-Mapped I/O (2)PollingInterrupts RevisitedHost-controller interface: InterruptsSupport for InterruptsInterrupt HandlerOther Types of InterruptsDirect Memory Access (DMA)DMA-CPU ProtocolDirect Memory Access (DMA)DMA IssuesPrinciples of I/O Software Goals of I/O Software (1)Goals of I/O Software (2)I/O Software LayersInterrupt Handlers (1)Interrupt Handlers (2)Device DriversSlide 29Functions in Device DriversDevice Driver ProtocolDevice Driver DiscussionSummaryCS241 System Programming Input/Output IKlara NahrstedtLecture 183/1/200601/13/19 CS 241 - System Programming, Klara Nahrstedt2Content Administrative announcementsI/O basic conceptsMemory Mapped I/OInterruptsDMAIntroduction to I/O Software PrinciplesSummary01/13/19 CS 241 - System Programming, Klara Nahrstedt3Administrative Homework 1 is posted – due 3/6/06 – Individual effortQuiz 5 – 3/3/0601/13/19 CS 241 - System Programming, Klara Nahrstedt4OverviewBasic I/O hardware –ports, buses, devices and controllers I/O Software –Interrupt Handlers, Device Driver, Device-Independent Software, User-Space I/O Software01/13/19 CS 241 - System Programming, Klara Nahrstedt5Principles of I/O HardwareSome typical device, network, and data base rates01/13/19 CS 241 - System Programming, Klara Nahrstedt6DevicesDevices–Storage devices (disk, tapes)–Transmission devices (network card, modem)–Human interface devices (screen, keyboard, mouse)–Specialized device (joystick)01/13/19 CS 241 - System Programming, Klara Nahrstedt7Device-Computer/Device-Device CommunicationPhysically: via signals over a cable or through air Logically: via a connection point - port (e.g., Serial port) Multiple devices are connected via a bus–A common set of wires and a rigidly defined protocol that specifies a set of messages that can be sent on the wires01/13/19 CS 241 - System Programming, Klara Nahrstedt8Device ControllerI/O units typically consist of a mechanical component and an electronic component. The electronic component is called the device controller or adapter. Example is a circuit board. The mechanical component is the device itself. Interface between controller and device is a very low level interface. Example: –Disk's controller converts the serial bit stream, coming off the drive into a block of bytes, and performs error correction. The block of bytes is first assembled in a buffer inside the controller. After its checksum has been verified, the error-free block is copied to main memory. –Built-in controllers01/13/19 CS 241 - System Programming, Klara Nahrstedt9I/O ControllerDisk controller - implements the disk side of the protocol that does: bad error mapping, prefetching, buffering, caching Controller has registers for data and control CPU and controllers communicate via I/O instructions and registers Memory-mapped I/O01/13/19 CS 241 - System Programming, Klara Nahrstedt10I/O Ports 4 registers - status, control, data-in, data-out–Status - states whether the current command is completed, byte is available, device has an error, etc –Control - host determines to start a command or change the mode of a device –Data-in - host reads to get input –Data-out - host writes to send output Size of registers - 1 to 4 bytes01/13/19 CS 241 - System Programming, Klara Nahrstedt11Memory-Mapped I/O (1)(a) Separate I/O and memory space(b) Memory-mapped I/O( c) Hybrid01/13/19 CS 241 - System Programming, Klara Nahrstedt12Memory-Mapped I/O (2)(a) A single-bus architecture(b) A dual-bus memory architecture01/13/19 CS 241 - System Programming, Klara Nahrstedt13Polling Polling - use CPU to Busy wait and watch status bits Feed data into a controller register 1 byte at a time - EXPENSIVE for large transfers Not acceptable except small dedicated systems not running multiple processes01/13/19 CS 241 - System Programming, Klara Nahrstedt14Interrupts RevisitedHow interrupts happens. Connections between devices and interrupt controller actually use interrupt lines on the bus rather than dedicated wires01/13/19 CS 241 - System Programming, Klara Nahrstedt15Host-controller interface: Interrupts CPU hardware has the interrupt report line that the CPU senses after executing every instruction –device raises an interrupt –CPU catches the interrupt and saves the state (e.g., Instruction pointer) –CPU dispatches the interrupt handler –interrupt handler determines cause, services the device and clears the interrupt Why interrupts?01/13/19 CS 241 - System Programming, Klara Nahrstedt16Support for InterruptsNeed the ability to defer interrupt handling during critical processing Need efficient way to dispatch the proper device –Interrupt comes with an address (offset in interrupt vector) that selects a specific interrupt handling Need multilevel interrupts - interrupt priority level01/13/19 CS 241 - System Programming, Klara Nahrstedt17Interrupt HandlerAt boot time, OS probes the hardware buses to determine what devices are present and installs corresponding interrupt handlers into the interrupt vector During I/O interrupt, controller signals that device is ready01/13/19 CS 241 - System Programming, Klara Nahrstedt18Other Types of InterruptsInterrupt mechanisms are used to handle wide variety of exceptions: –Division by zero, wrong address –Virtual memory paging –System calls (software interrupts/signals, trap) –Multi-threaded systems01/13/19 CS 241 - System Programming, Klara Nahrstedt19Direct Memory Access (DMA) Direct memory access (DMA) –Assists in exchange of data between CPU and I/O controllerCPU can request data from I/O controller byte by byte – but this might be inefficient (e.g. for disk data transfer)–Uses a special purpose processor, called a DMA controller01/13/19 CS 241 - System Programming, Klara Nahrstedt20DMA-CPU ProtocolCPU programs DMA controller, sets registers to specify source/destination addresses, byte count and control information (e.g., read/write) and goes on with other work DMA controller proceeds to operate the memory bus directly without help of main CPU – request from I/O controller to move/write data to memory addressDisk controller transfers data to main


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U of I CS 241 - Lecture 18

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