ECGR 2252Mehdi MiriECE Dept.UNC CharlotteTiming Circuits• One-shot• Waveform generation• 555 Timer based designsECGR 2252Mehdi MiriECE Dept.UNC CharlotteR-S Flip-FlopU1A74LS02231U1B74LS02564RSQQ’Logic DiagramSRQnQ’nQn+1Q’n+110xx1001xx0100xxQnQ’n11xxNot AllowedTruth TableECGR 2252Mehdi MiriECE Dept.UNC CharlotteComparatorsLM393+3-2V+8V-4OUT1Vin(t) = v3-v2(analog)vout= v1(digital)vinvoutV+V-Hysteresis(In mV)ECGR 2252Mehdi MiriECE Dept.UNC CharlotteTransistor SwitchCircuit Symbol & Analogy:Symbol AnalogyC (Collector)E (Emitter)B (Base)IBIEICIswB (Push Button)E12DIODECECGR 2252Mehdi MiriECE Dept.UNC CharlotteMonostable Design:U1A74LS02231U1B74LS02564U2ALM393+3-2V+8V-4OUT1U2BLM393+5-6V+8V-4OUT7Q2PN2222AC1RRRR1000R-S Flip FlopOne-Shot or Monostable CircuitDischargeThresholdTriggerOUTU301 2VccECGR 2252Mehdi MiriECE Dept.UNC CharlotteECGR 2252Mehdi MiriECE Dept.UNC CharlotteOne-shot timing waveformsT2 << T < T1ECGR 2252Mehdi MiriECE Dept.UNC CharlotteOutputTriggerTT1T2ECGR 2252Mehdi MiriECE Dept.UNC CharlotteMonostable w/ Power-On Reset:231U1A74LS02564U1B74LS02+3-2V+8V-4OUT1U2ALM393+5-6V+8V-4OUT7U2BLM393Q2PN2222AC1RRRR1000R-S Flip FlopOne-Shot or Monostable CircuitDischargeThresholdTriggerOUTR2 C201 2U30VccECGR 2252Mehdi MiriECE Dept.UNC CharlotteWaveform Generation:231U1A74LS02564U2B74LS02+3-2V+8V-4OUT1U3ALM393+5-6V+8V-4OUT7U3BLM393Q2PN2222ACRRRVcc0001 2U40R-S Flip FlopDischargeThresholdTriggerOUTAstable CircuitR1R2TLTHT1Ht=0ECGR 2252Mehdi MiriECE Dept.UNC CharlotteAnalysis of Astable CircuitBy KVL during charging of C:Vcc = (R1+R2)*i(t) + Vc(t)i(t) = C*dVc/dtVcc = (R1+R2)*C*dVc/dt + Vc(t)Vc(0) = Vcc/3Solving for Vc(t),Vc(t) = Vcc*{1-(2/3)*exp[-t/((R1+R2)*C)]}2Vcc/3 = Vcc*{1-(2/3)*exp[-T1/((R1+R2)*C)]}T1 = ln(2)*(R1+R2)*C = 0.69*(R1+R2)*CECGR 2252Mehdi MiriECE Dept.UNC CharlotteAnalysis of Astable CircuitBy KVL during discharging of C:Vc(t) - R2*i(t) = 0i(t) = - C*dVc/dtVc(t) + R2*C*dVc/dt = 0Vc(0) = (2/3)VccSolving for Vc(t),Vc(t) = (2/3)Vcc*exp[-t/(R2*C)]Vcc/3 = (2/3)Vcc*exp[-T2/(R2*C)]T2 = ln(2)*R2*C = 0.69*R2*CECGR 2252Mehdi MiriECE Dept.UNC CharlotteAnalysis of Astable CircuitFrequency is given by:T = T1+T2f = 1/T = 1/[0.69*(R1+2R2)*C]Active-low duty cycle (D.C.) is:D.C. = T2/T = R2/(R1+2R2)Active-high duty cycle is:D.C. = T1/T = (R1+R2)/(R1+2R2)See www.national.com for LMC555