Combinational Logic Building BlocksDecodersDecoder Example: Seven-Segment DecodersBinary n-to-2n Decoders2-to-4 Binary Decoder3-to-8 Binary DecoderImplementing Functions Using DecodersSlide 8Standard MSI Binary Decoders ExampleEncoders8-to-3 Binary EncoderThree State (Tri-State) BuffersMultiplexers4-to-1 MUX4-to-1 MUX CircuitLarger MultiplexersSlide 17Standard MSI Multiplexer ExampleDemultiplexers1-to-4 DemultiplexerMux-Demux Application ExampleEECC341 - ShaabanEECC341 - Shaaban#1 Lec # 9 Winter 2001 1-10-2002Combinational Logic Building Blocks•Decoders:–Binary n-to-2n decoders.–Implementing functions using decoders.•Encoders:–2n -to-n binary decoders.•Three-State Buffers.• Multiplexers.•DemultiplexersEECC341 - ShaabanEECC341 - Shaaban#2 Lec # 9 Winter 2001 1-10-2002DecodersDecoders•A decoder is a multiple-input, multiple-output logic circuit that converts coded inputs into coded outputs, where the input and output codes are different. e.g. n-to-2n, BCD decoders.•Enable inputs must be on for the decoder to function, otherwise its outputs assume a single “disabled” output code word. DecoderMapInputCode wordEnableinputsOutput code wordEECC341 - ShaabanEECC341 - Shaaban#3 Lec # 9 Winter 2001 1-10-2002Decoder Example: Seven-Segment Decoders•A seven segment decoder has 4-bit BCD input and the seven segment display code as its output:•In minimizing the circuits for the segment outputs all non-decimal input combinations (1010, 1011, 1100,1101, 1110, 1111) are taken as don’t-cares/Bl D C B A a b c d e f g 0 x x x x 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 1 0 1 1 0 0 0 0 1 0 0 1 0 1 1 0 1 1 0 1 1 0 0 1 1 1 1 1 1 0 0 1 1 0 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 1 1 0 0 0 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 1 0 0 0 0 1 1 0 1 1 1 0 1 1 0 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 0 1 1 1 1 1 0 1 1 0 0 1 0 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 -- don’t care inputs --EECC341 - ShaabanEECC341 - Shaaban#4 Lec # 9 Winter 2001 1-10-2002Binary n-to-2Binary n-to-2nn Decoders Decoders•A binary decoder has n inputs and 2n outputs.•Only the output corresponding to the input value is equal to 1.::ninputsn to 2ndecoder2noutputsEECC341 - ShaabanEECC341 - Shaaban#5 Lec # 9 Winter 2001 1-10-20022-to-4 Binary Decoder2-to-4 Binary Decoder•From truth table, circuit for 2x4 decoder is:•Note: Each output is a 2-variable minterm (X'Y', X'Y, XY' or XY)X Y F0F1F2F30 0 1 0 0 00 1 0 1 0 01 0 0 0 1 01 1 0 0 0 1F0 = X'Y'F1 = X'YF2 = XY'F3 = XYX YTruth Table: 2-to-4DecoderXYF0F1F2F3EECC341 - ShaabanEECC341 - Shaaban#6 Lec # 9 Winter 2001 1-10-20023-to-8 Binary Decoder3-to-8 Binary Decoderx y z F0F1F2F3F4F5F6F70 0 0 1 0 0 0 0 0 0 00 0 1 0 1 0 0 0 0 0 00 1 0 0 0 1 0 0 0 0 00 1 1 0 0 0 1 0 0 0 01 0 0 0 0 0 0 1 0 0 01 0 1 0 0 0 0 0 1 0 01 1 0 0 0 0 0 0 0 1 01 1 1 0 0 0 0 0 0 0 1F1 = x'y'zx zyF0 = x'y'z'F2 = x'yz'F3 = x'yzF5 = xy'zF4 = xy'z'F6 = xyz'F7 = xyzTruth Table: 3-to-8DecoderXYF0F1F2F3F4F5F6F7ZEECC341 - ShaabanEECC341 - Shaaban#7 Lec # 9 Winter 2001 1-10-2002Implementing Functions Using Decoders•Any n-variable logic function, in canonical sum-of-minterms form can be implemented using a single n-to-2n decoder to generate the minterms, and an OR gate to form the sum.–The output lines of the decoder corresponding to the minterms of the function are used as inputs to the or gate.•Any combinational circuit with n inputs and m outputs can be implemented with an n-to-2n decoder with m OR gates.•Suitable when a circuit has many outputs, and each output function is expressed with few minterms.EECC341 - ShaabanEECC341 - Shaaban#8 Lec # 9 Winter 2001 1-10-2002Implementing Functions Using Decoders•Example: Full adderS(x, y, z) =  (1,2,4,7)C(x, y, z) =  (3,5,6,7)3-to-8DecoderS2S1S0xyz01234567SCx y z C S0 0 0 0 00 0 1 0 10 1 0 0 10 1 1 1 01 0 0 0 11 0 1 1 01 1 0 1 01 1 1 1 1EECC341 - ShaabanEECC341 - Shaaban#9 Lec # 9 Winter 2001 1-10-2002Standard MSI Binary Decoders ExampleStandard MSI Binary Decoders Example74138 (3-to-8 decoder)(a) Logic circuit. (b) Package pin configuration. (c) Function table.EECC341 - ShaabanEECC341 - Shaaban#10 Lec # 9 Winter 2001 1-10-2002Encoders•If the a decoder's output code has fewer bits than the input code, the device is usually called an encoder. e.g. 2n-to-n, priority encoders.•The simplest encoder is a 2n-to-n binary encoder, where it has only one of 2n inputs = 1 and the output is the n-bit binary number corresponding to the active input.•For an 8-to-3 binay encoder with inputs I0-I7 the logic expressions of the outputs Y0-Y2 are: Y0 = I1 + I3 + I5 + I7 Y1= I2 + I3 + I6 + I7 Y2 = I4 + I5 + I6 +I7 ......2ninputsn outputsBinaryencoderEECC341 - ShaabanEECC341 - Shaaban#11 Lec # 9 Winter 2001 1-10-20028-to-3 Binary Encoder8-to-3 Binary EncoderAt any one time, only one input line has a value of 1.Inputs OutputsI0I1I2I3I4I5I6I7y2y1y21 0 0 0 0 0 0 0 0 0 00 1 0 0 0 0 0 0 0 0 10 0 1 0 0 0 0 0 0 1 00 0 0 1 0 0 0 0 0 1 10 0 0 0 1 0 0 0 1 0 00 0 0 0 0 1 0 0 1 0 10 0 0 0 0 0 1 0 1 1 00 0 0 0 0 0 0 1 1 1 1I0I1I2I3I4I5I6I7Y0 = I1 + I3 + I5 + I7y1 = I2 + I3 + I6 + I7Y2 = I4 + I5 + I6 + I7EECC341 - ShaabanEECC341 - Shaaban#12 Lec # 9 Winter 2001 1-10-2002Three State (Tri-State) Buffers•Three state buffers are CMOS and TTL devices whose outputs may be in one of three states: 0, 1 or Hi-Z (high impedance, or floating state.•Have an extra input called “output enable” or “output disable”.•When enables the device transmits the input value or its complement to the output.EnableInputOutputEECC341 - ShaabanEECC341 - Shaaban#13 Lec # 9 Winter 2001 1-10-2002Multiplexers•A multiplexer (MUX) is a digital switches which connects data from one of n sources to the output.•A number of select inputs determine which data source is connected to the output.Multiplexerb bitsb bitsb bits..Dataoutputn DataSourcess bitsSelectEnable