1EE382V – System-on-Chip Design – Application Mapping SPS-1 University of Texas at AustinMapping High-Level Language Applications to SystemCSteven P. SmithDesign of Embedded SystemsEE382VFall 2009EE382V – System-on-Chip Design – Application Mapping SPS-2 University of Texas at AustinOverview• Many projects begin with a working HLL application.• Particularly common in multimedia and communications• Goals• Maintain conformance with original applicationsoftware throughout development• The HLL implementation serves as the gold model.• Profiling data and architecture considerations driveprocess• Support incremental mapping of modules• One accelerator at a time…• SystemC is well suited for use with C/C++ HLL apps.2EE382V – System-on-Chip Design – Application Mapping SPS-3 University of Texas at AustinStandards-Based Applications• Predominant in some important domains• Wireless Communications• Networking• Audio, Video• Standards are often developed using a community-developed HLL application.• The application embodies the standard.• Such referenceapplications are seldom well structured or optimized.• Full conformance to standard is crucial to success.EE382V – System-on-Chip Design – Application Mapping SPS-4 University of Texas at AustinSteps in Moving from Reference Code to an Embedded Implementation• Algorithm study and analysis• Setting target performance requirements• Understanding reference code structure• Profiling, identification of bottlenecks• What functions must be accelerated to meet performance targets?• Developing a Hardware Abstraction Layer (HAL)• Modifying code to make it suitable for hardware• Mapping the application onto the hardware• Readying the application for production3EE382V – System-on-Chip Design – Application Mapping SPS-5 University of Texas at AustinFrom Reference Code to Embedded Implementation• Conformance maintained at all phases of design• Reference application used to generate module-level test vectors• Hardware/Software co-design a natural by-product• Hardware abstraction layer (HAL) defines the interface between application software and any special-purpose hardware• Need a development environment supporting hardware models and application software execution• SystemC (informal software support)EE382V – System-on-Chip Design – Application Mapping SPS-6 University of Texas at AustinSystemC• Class library extension to C++• Extended to support verification-specific constructs• C++ can be intimidating to HW designers trained in Verilog or VHDL• Software developers find it easier to integrate their programs and tools than with other ESL languages.• Open standard effort through the Open SystemC Initiative (OSCI)• Synthesis tools emerging in the marketplace (e.g., Forte, Mentor Graphics)4EE382V – System-on-Chip Design – Application Mapping SPS-7 University of Texas at AustinSystemC ArchitectureC++ Language StandardEvent-Driven Simulation EngineEvents, ProcessesStructure ElementsModulesPortsInterfacesChannelsData Types4-value LogicBits, Bit VectorsArbitrary-Precision IntegersFixed-Point TypesPrimitive ChannelsSignals, FIFOs, mutexes, semaphores, etc.Methodology-Specific LibrariesMaster/Slave, etc.Layered LibrariesVerification,TLM, etc.EE382V – System-on-Chip Design – Application Mapping SPS-8 University of Texas at AustinConsiderations in Selecting Modules for Realization as Accelerators• Software profile data can help filter candidate modules.• HLL function boundaries not always appropriate module boundaries• Some code refactoring may be necessary• Input/output requirements also a factor• Transfer overhead can swamp advantage of acceleration• Look for opportunities for module-level parallelism• Identify synchronization requirements• Global variables must be eliminated from module• Map to arguments• Data transfer alternatives (e.g., DMA, processor-directed)5EE382V – System-on-Chip Design – Application Mapping SPS-9 University of Texas at AustinThe Hardware Abstraction Layer (HAL)• Provides an efficient interface to hardware while maintaining application code structure.• From application, HW accelerator looks like a function call• From HW accelerator, application looks like HW/buffer• Define functions for each HW/SW interaction, isolating hardware detail from application software.• Provide synchronization primitives required for flow control, management of parallel activity.• Enables mixture of hardware and software models• Selective use of hardware modules supports debug in emulation environment• Expanded verification challengeEE382V – System-on-Chip Design – Application Mapping SPS-10 University of Texas at AustinFormalizing the HAL Interfaces• A formal, standardized representation would be helpful.• Support tool-based interface generation and error-checking• Ease IP re-use• Capture constraints• Bridge the gap between software and hardware constraints• The Architecture and Analysis and Design Language (AADL) • Originally the “Avionics Architecture Description Language”• Safety-critical and mission-critical applications were initial focus• Separates types(interfaces) and implementations• http://www.sei.cmu.edu/pub/documents/06.reports/pdf/06tn011.pdf6EE382V – System-on-Chip Design – Application Mapping SPS-11 University of Texas at AustinHAL Application Interface Layer• Application Layer• Maps HLL function call to lower layer of HALvoid appFunction1(int * data, int dataSize){#if HAL_ENABLEDint i ;HAL_checkReadyFunction1(TRUE) ;for (i=0; i < dataSize ; i++){HAL_enqueueToFunction1(data[i]) ;}HAL_startFunction1() ;#else// … Existing HLL application function code …#endif}EE382V – System-on-Chip Design – Application Mapping SPS-12 University of Texas at AustinHAL Hardware Interface Layer• Hardware Layer• Interacts with HW for synchronization, data transfers, and status queriesint HAL_waitReadyFunction1(int waitTillReady){int result ;do {result = HAL_ADR_Function1Status() ;} while (!result && waitTillReady) ;return result ;}7EE382V – System-on-Chip Design – Application Mapping SPS-13 University of Texas at AustinHAL Layers• Hardware Layer with Instrumentation• Can be used to capture stimuliint HAL_enqueueToFunction1(int data){#if HAL_GEN_VERILOGfprintf(pfVStim,”halFunction1InputData = %d ;\n”, data) ;#endifhalFunction1InputQueue = data ;}EE382V –