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SJSU EE 166 - 4 Bit Serial to Parallel Converter

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EE166 ProjectSpecificationsDesignSlide 4Serial - Parallel TBTiming stripLayoutResultsEE166 Project4 Bit Serial to Parallel ConverterJim AhlmanGashaw BekeleSpecifications•Serial data in - 4 bits parallel data out•Input clock at 25 MHz•Outputs to drive 10pF @ 10 MHz•Power consumption < 500 mW•Noise immunity switch w/ Schmidt trigger•Die area < 1 square mmDesign•Schmidt triggers for 3 inputs–1 volt and 4 volt trigger points–Wnf = 18 uM, Wpf = 14 uM•4 output buffers to drive 10 pF @ 10 MHz–2 stages 208 & 100 uM, 60 & 28 uMDesign•3 input nand•Modified circuit w/o SET function•34 transistors/FF•Sized for fall & rise time of ~ 1.2 nSSerial - Parallel TBTiming stripLayoutResults•Power consumption calculated < 50 mW•Die area ~ 500 uM x 500 uM•Simulation would not run w/ extracted


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SJSU EE 166 - 4 Bit Serial to Parallel Converter

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