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High-Speed Serial Links



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Signature Based Testing for Digitally Assisted Adaptive Equalizers in High Speed Serial Links Mohamed Abbas1 Kwang Ting Tim Cheng1 2 Yasuo Furukawa3 Satoshi Komatsu1 and Kunihiro Asada1 mohamed komatsu VDEC u tokyo ac jp timcheng ece ucsb edu yasuo furukawa jp advantest com asada silicon u tokyo ac jp 1 2 VLSI Design Education Center The University of Tokyo Tokyo 113 0032 Japan Department of Electrical and Computer Engineering University of California Santa Barbara 3 ADVANTEST Corporation Gunma 370 0718 Japan Abstract This paper presents a cost effective test methodology for adaptive equalizers which follow the digitally assisted analog design style By observing the states in the digital adaptation engine during or after the adaptation process in response to the test stimulus the health of the adaptive equalizer can be determined We propose two different types of signatures namely static and dynamic signatures based on the states of the digital adaptation engine for fault detection The static signatures are derived from states after the adaption process converges and the dynamic ones from the state sequences sampled during adaption Such signatures combined with a variety of test stimuli enable the detection of many hardto detect faults which cannot be detected by existing approaches Our experimental results demonstrate the effectiveness and efficiency of the proposed method 1 Introduction Advances in integrated circuit IC fabrication technology have enabled the design of many highperformance digital systems These systems require efficient communication between multiple chips to achieve required system performance The PHY bit rate has increased by one order of magnitude in the past eight years 1 The drive to higher bandwidth interface has resulted in the adoption of high speed serial links HSSL The large scale integration creates significant challenges not only in designing these high performance interface circuits but also in testing them in a noisy SoC environment



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