MIT 6 973 - Application Specific Integrated Circuit Design

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Application Specific Integrated Circuit Design Lecture 5 Vladimir Stojanoviü 6.973 Communication System Design – Spring 2006 Massachusetts Institute of Technology Cite as: Vladimir Stojanovic, course materials for 6.973 Communication System Design, Spring 2006. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].Modern digital systems engineering u Managing complexity and connectivity Personal Computer: Circuit Board:Hurdware & software =8 / system 1-166 devices Scheme for rsprcsenting infomtion Courtesy of Arvind and Krste Asanovic. Used with permission. Integrated Circuit: \ w8-16 / PCB 0.25M-16devices &-16/IC 1OOK devices Gate: 16-64 devices =2-16 / Cell 8 devices Cite as: Vladimir Stojanovic, course materials for 6.973 Communication System Design, Spring 2006. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY]. 6.973 Communication System DesignChip design styles  Full-custom  Transistors are hand-drawn  Best performance (although almost extinct)  Alpha processors, older Intel processors  Recent processors are semi-custom (Sun, AMD, Intel)  Standard-Cell-based ASICs  Only use standard cells from the library  Dominant design style for non-processor, comms and multimedia ASICs  This is what we will use in 6.973 (also used in 6.375)  Cheaper alternatives (for small volumes)  Sea of Gates (mask-programmable gate arrays)  Field Programmable Gate Arrays (FPGA)  On-the fly reconfigurable interconnect  Flexibility vs. cost  Tighter control over transistors increases design cost  Can make faster designs but harder to verify and more expensive Cite as: Vladimir Stojanovic, course materials for 6.973 Communication System Design, Spring 2006. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY]. 6.973 Communication System Design 3Modern Application-Specific IC (ASIC)  Multiple functional blocks Our ASIC example:  Put together at the top level 802.11a PHY  Makes a WLAN chip  Lots of modeling  Behavioral level  Architecture/functional level Image removed due to copyright restrictions.  Different teams on each block  Need to make sure things work  When connected  Many levels of hierarchy  Lots of iteration and reuse  Many architectural choices  Use lots of implementation tricks  Micro-architecture and algorithmic transforms [Thompson02]  Straightforward solutions many times the chip size  Sophisticated CAD tools to architect and verify 4M design Cite as: Vladimir Stojanovic, course materials for 6.973 Communication System Design, Spring 2006. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY]. 6.973 Communication System Design 4Macro modules 256x32 (or 8192 bit) SRAM Generated by hard-macro module generator Image removed due to copyright restrictions. Generate highly regular structures (entire memories, multipliers, etc.) with a few lines of code Verilog models for memories automatically generated based on size Example-chip-in-a-day flow (B. Brodersen, UC Berkely) A bunch of macros pre-generated (multipliers, adders, memories) Easy to do COmm system design Courtesy of Anantha Chandrakasan. Used with permission. Cite as: Vladimir Stojanovic, course materials for 6.973 Communication System Design, Spring 2006. MIT Opencourseware (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY]. 6.973 Communication System DesignGate Arrays Can cut mark costs by prefabricating arrays of transistors on wafers Only customize metal layer for each design Image removed due to copyright restrictions. Fixed-size unit transistors Metal connections personalize design Two kinds: Channeled Gate Arrays -Leave space between rows of transistors for routing Sea-of-Gates -Route over the top of unused transistors Courtesy of Arvind and Krste Asanovic. Used with permission. [ OCEAN Sea-of -Gates Base Pattern 1 Cite as: Vladimir Stojanovic, course materials for 6.973 Communication System Design, Spring 2006. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY]. 6.973 Communication System DesignGate Array Pros and Cons Cheaper and quicker since less masks to make -Can stockpile wafers with diffusion and poly finished Memory inefficient when made from gate array - Embedded gate arrays add multiple fixed memory blocks to improve density (=>Structured ASICs) - Cell -based array designed to provide efficient memory cell (6 transistors in basic cell) Logic slow and big due to fixed transistors and wiring overhead - Advanced cell -based arrays hardwire logic functions (NANDs/NORs/LUTs) which are personalized with metal Courtesy of Arvind and Krste Asanovic. Used with permission. Cite as: Vladimir Stojanovic, course materials for 6.973 Communication System Design, Spring 2006. MIT Opencourseware (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY]. 6.973 Communication System DesignField-Programmable Gate Arrays (FPGA) Each cell in array contains a programmable logic function Array has programmable interconnect between logic functions Arrays mass-produced and programmed by customer after fabrication -Can be programmed by blowing fuses, loading SRAM bits, or loading FLASH memory Overhead of programmability makes arrays expensive and slow but startup costs are low, so much cheaper than ASIC for small volumes Image removed due to copyright restrictions. Virtex4 FPGA Courtesy of Arvind and Krste Asanovic. Used with permission. Cite as: Vladimir Stojanovic, course materials for 6.973 Communication System Design, Spring 2006. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY]. 6.973 Communication System DesignXilinx Configurable logic block (CLB)  Full-add, LUT, shift, mux, xor, ff Courtesy of Arvind and Krste Asanovic. Used with permission. Courtesy of David B. Parlour. Cite as: Vladimir Stojanovic, course materials for 6.973 Communication System Design, Spring 2006. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY]. 6.973 Communication System Design 9Standard


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MIT 6 973 - Application Specific Integrated Circuit Design

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