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MIT 6 111 - Analog Blocks

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6.111 Lecture 141. Operational Amplifiers: an IntroductionThe Inside of a 741 OpAmpSimple Model for an OpAmpThe Power of (Negative) FeedbackBasic OpAmp CircuitsOpAmp as a Comparator2. Data Conversion: NoiseNon-idealities in Data Conversion3. Digital to AnalogR-2R Ladder DAC ArchitectureLabkit: ADV7125 Triple Out Video DACGlitching and Thermometer D/A4. Analog to DigitalSuccessive-Approximation A/DSuccessive-Approximation A/DSigma Delta ADCSigma Delta ADCFlash A/D ConverterHigh Performance Converters:Use Pipelining and Parallelism!5. Interfacing to FPGA’sSimple A/D Interface FSMExample: Digital PotentiometerExample: Digital PotentiometerSummary6.111 Fall 2005 Lecture 14, Slide 16.111 Lecture 14Today: Analog Blocks1.Op Amps2.Conversion noise3.Digital to Analog4.Analog to Digital5.Interfacing to FPGA’sAcknowledgements: Dave Wentzloff6.111 Fall 2005 Lecture 14, Slide 21. Operational Amplifiers: an IntroductionDC Model• Typically very high input resistance ~ 300KΩ• High DC gain (~105)• Output resistance ~75ΩinoutVfaVidva×idvinRoutR+−outv⋅=)(a(f)f10Hz105-20dB/decadeLM741 Pinout+10 to +15V-10 to -15V6.111 Fall 2005 Lecture 14, Slide 3The Inside of a 741 OpAmpDifferentialInput StageAdditionalGain StageOutput StageCurrent Source for biasingBipolar versionhas small inputBias currentMOS OpAmpshave ~ 0 input currentGain is Sensitive to Operating Condition (e.g., Device, Temperature, Power supply voltage, etc.)Output devicesprovides largedrive current6.111 Fall 2005 Lecture 14, Slide 4Simple Model for an OpAmp+-i+~ 0i-~ 0+-+-vidvoutvoutvidVCC= 10V-VCC= -10Vε = 100µV-100µVReasonable approximation+-vid+-avid+-voutLinear Mode If -VCC< vout< VCC+-vid-VCC+-voutNegative Saturationvid< - ε-++-vid+-voutPositive Saturationvid> ε-++VCC-VCCVCCVery small input range for “open loop” configuration6.111 Fall 2005 Lecture 14, Slide 5The Power of (Negative) Feedback-+vid+-avid+-voutinvR2-+R1outv1R2R-++-inv021=+++RvvRvvidoutidin⎥⎦⎤⎢⎣⎡++−=221111RRaRavRvoutinavvoutid=()()1112212>>−≈++−= aifRRRRaaRvvinout Overall (closed loop) gain does not depend of open loop gain Trade gain for robustness Easier analysis approach: “virtual short circuit approach” v+= v-= 0 if OpAmp is linear6.111 Fall 2005 Lecture 14, Slide 6Basic OpAmp Circuitsinvoutv2R1RinRRRoutvv121+≈+−Non-invertingVoltage Follower (buffer)invoutv1invoutv2inv1R1R2R2R()1212ininRRoutvvv−≈Differential Inputinoutvv≈+-invoutvRC∫∞−−≈tinRCoutdtvv1Integrator6.111 Fall 2005 Lecture 14, Slide 7OpAmp as a ComparatorAnalog Comparator:Is V+ > V- ? The Output is a DIGITAL signalLM311 uses a single supply voltage6.111 Fall 2005 Lecture 14, Slide 82. Data Conversion: NoiseA/D ConversionA/DD/AdigitalcodeinvQuantizationnoise+−0001101104refV2refV43refVAnalog InputBinaryOutputrefVinvnoisevLSB00 01 101104refV2refV43refVBinary codeAnalog Output4refV2refV43refVrefVD/A Conversion• Quantization noise exists even with idealA/D and D/A converters6.111 Fall 2005 Lecture 14, Slide 9Non-idealities in Data ConversionOffset – a constant voltage offset that appears at the output when the digital input is 0Binary codeAnalogIdealGainerrorGain error – deviation of slope from ideal value of 1Binary codeAnalogIdealOffseterrorBinary codeAnalogIdealIntegralnonlinearityIntegral Nonlinearity – maximum deviation from the ideal analog output voltageDifferential nonlinearity – the largest increment in analog output for a 1-bit changeBinary codeAnalogIdealNon-monoticity6.111 Fall 2005 Lecture 14, Slide 103. Digital to Analog• Common metrics: • Conversion rate – DC to ~500 MHz (video) • # bits – up to ~24 • Voltage reference source (internal / external; stability)• Output drive (unipolar / bipolar / current) & settling time• Interface – parallel / serial• Power dissipation• Common applications: • Real world control (motors, lights)• Video signal generation• Audio / RF “direct digital synthesis”• Telecommunications (light modulation)• Scientific & Medical (ultrasound, …)6.111 Fall 2005 Lecture 14, Slide 11R-2R Ladder DAC Architecture-1Note that the driving point impedance (resistance) is the same for each cell.• R-2R Ladder achieves large current division ratios with only two resistor values6.111 Fall 2005 Lecture 14, Slide 12Labkit: ADV7125 Triple Out Video DAC• Three 8-bit DACs• Single Supply Op.: 3.3 to 5V• Internal bandgap voltage ref• Output: 2-26 mA• 330 MSPS (million samples per second)• Simple edge-triggered latch based interface6.111 Fall 2005 Lecture 14, Slide 13Glitching and Thermometer D/A• Glitching is caused when switching times in a D/A are not synchronized• Example: Output changes from 011 to 100 – MSB switch is delayed100011→outvt0TIRoutv()210TTTIRvout++−=II1T2T• Filtering reduces glitch but increases the D/A settling time• One solution is a thermometer code D/A – requires 2N –1 switches but no ratioed currentsThermometerBinary11001111111001000000ThermometerBinary110011111110010000006.111 Fall 2005 Lecture 14, Slide 144. Analog to Digital• Common metrics: • Conversion rate – DC to ~100 MHz• # bits – up to ~20 • Input range – unipolar / bipolar • Interface – parallel / serial• Type: successive approximation, sigma-delta, flash• Common applications: • Real world sensing (position, speed, force, temperature, …)• Video signal digitization• Audio / RF recording & receiving• Telecommunications (light demodulation)• Scientific & Medical6.111 Fall 2005 Lecture 14, Slide 15Successive-Approximation A/D D/A converters are typically compact and easier to design. Why not A/D convert using a D/A converter and a comparator? DAC generates analog voltage which is compared to the input voltage If DAC voltage > input voltage then set that bit; otherwise, reset that bit This type of ADC takes a fixed amount of time proportional to the bit lengthExample: 3-bit A/D conversion, 2 LSB < Vin< 3 LSBVref0.5Vref0Vint = 0 t = 1 t = 2code = 100code = 010code = 011D/Aoutput01Comparator output010ttVincodeD/AComparatoroutC+−6.111 Fall 2005 Lecture 14, Slide 16Successive-Approximation A/DDataSuccessiveApproximationGeneratorControlSerial conversion takes a time equal to N (tD/A+ tcomp)DoneGo-+Sample/HoldD/AConverterNvin6.111 Fall 2005 Lecture 14, Slide 17Sigma Delta ADC• Digitize differential signal: integratorDAC++-AnaloginputDigitaloutput-+• “oversampled” at many times Nyquist frequency•


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MIT 6 111 - Analog Blocks

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