Electronic Circuits LaboratoryEE462GLab #6Biasing MOSFET devicesn-Channel MOSFETA Metal-Oxide-Semiconductor field-effect transistor (MOSFET) is presented for charge flowing in an n-channel:+VGS_+VDS_DGSBB – Body or SubstrateD – DrainG – GateS – SourceFor many applications the body is connected to the source and thus most FETs are packaged that way.nnpIDGDSFET OperationThe current flow between the drain and the source can be controlled by applying a positive gate voltage:Three Regions of Operation:Cutoff region (VGS≤ Vtr)Triode region (VDS ≤ VGS- Vtr)Saturation (VGS- Vtr≤ VDS )nnp+VGS_+VDS_------VGSIDCutoff RegionIn this region (VGS≤ Vtr) the gate voltage is less than the threshold voltage and virtually no current flows through the reversed biased PN interface between the drain and body.Typical values for Vtr(or Vto) range from 1 to several volts. Cutoff region: ID=0nnp+VGS_+VDS_ID++++++++++--------------Triode RegionIn this region (VGS> Vtrand VDS ≤ VGS- Vtr) the gate voltage exceeds the threshold voltage and pulls negative charges toward the gate. This results is an n-Channel whose width controls the current flow ID between the drain and source.Triode Region: (VDS ≤ VGS- Vtr)nnp+VGS_+VDS_------VGSID[]222DSDStrGSDVVVVKPLWI −−⎟⎠⎞⎜⎝⎛= )(where:product of surface mobility of channel electrons µnand gate capacitance per unit area Cox in units of amps per volts squared,W is the channel width, andL is channel length.oxnCKPµ=Saturation RegionIn this region (VGS> Vtrand VGS- Vtr≤ VDS ) the drain-source voltage exceeds the excess gate voltage and pulls negative charges toward the drain and reduces the channel area at the drain. This limits the current making it more insensitive/independent to changes in VDS.Saturation: VGS- Vtr≤ VDS +VGS_+VDS_nnp-----ID22)(trGSDVVKPLWI −⎟⎠⎞⎜⎝⎛=2)(trGSDVVKI −=The material parameters can be combined into one constant:At the point of Saturation, for a given VGS , the following relation holds:2DSDKVI =NMOS Transfer CharacteristicsThe relations between IDand VDSfor the operational regions of the NMOS transistor can be used to generate its transfer characteristic. These can be conveniently coded in a Matlab functionfunction ids = nmos(vds,vgs,KP,W,L,vto)% This function generates the drain-source current values "ids" for% and NMOS Transistor as a function of the drain-source voltage "vds".% ids = nmos(vds ,vgs,KP,W,L,vto)% where "vds" is a vector of drain-source values% "vgs" is the gate voltage% "KP" is the device parameter% "W" is the channel width% "L" is the channel length% "vto" is the threshold voltage% and output "ids" is a vector of the same size of "vds"% containing the drain-source current values.NMOS Transfer Characteristicsids = zeros(size(vds)); % Initialize output array with all zerosk = (W/L)*KP/2; % Combine devices material parameters% For non-cutoff operation: if vgs >= vto% Find points in vds that are in the triode regionktri = find(vds<=(vgs-vto) & vds >= 0); % Points less than gate – threshold voltage% If points are found in the triode region compute ids with proper formula if ~isempty(ktri)ids(ktri) = k*(2*(vgs-vto).*vds(ktri)-vds(ktri).^2);end% Find points in staturation regionksat = find(vds>(vgs-vto) & vds >= 0); % Points greater than the excess voltage% if points are found in the saturation regions compute ids with proper formula if ~isempty(ksat)ids(ksat) = k*((vgs-vto).^2);end% If points of vds are outside these ranges then the ids values remain zeroend0 0.5 1 1.5 2 2.5 3 3.5 405101520253035VDS in VID in mANMOS Transfer CharacteristicsPlot the transfer characteristics of an NMOS transistor where KP = 50 µA/V2, W= 160 µm, L= 2 µm, Vtr= 2V, and for VGS = [.5, 1, 2, 3, 4, 5, 6] voltsvgs = [.5, 1, 2, 3, 4, 5, 6]vds =[0:.01:4];for kc = 1:length(vgs)ids = nmos(vds,vgs(kc),50e-6,160e-6,2e-6,2);figure(1); plot(vds,ids*1000)hold onendids = (50e-6/2)*(160e-6/2e-6)*vds.^2;figure(1); plot(vds,ids*1000,'g:')hold offxlabel('VDS in V')ylabel('ID in mA')Saturation Region Boundary Triode Region Boundary IDS=K(VDS)2VGS = 6 VGS = 5VGS = 4 VGS = 3 VGS = 2, 1, & 0.5Biasing NMOS VoltagesKVL can be applied to the following circuit to set resistors so that VDSand IDare set to a quiescent point.DSDDSDDIRRVV )(+=− VDD D G S Vout + - RD R 2 R S R 1 +-ID V GG + - KVLDDSSDSDDDIVRRRRV=+−+ )()(1The above linear equation can be plotted with the MOSFET’s TC to perform a load line analysis and find the quiescent point VDSQand IDQ.Load Line Analysis ExampleGiven RD= RS= 1kΩ and VDD= 12 V, superimpose load line on TC for various VGSvalues of MOSFET with K=.2 A/V2and Vtr= 2.5 V>> % Set Parameters>> K=.2; vto = 2.1;>> W=1; L=1; KP=2*K;>> VDD=12; RS=1e3; RD=1e3;>> vds = [0:.05:VDD]; % Create X-Axis>> idsll = -vds/(RD+RS) + VDD/(RD+RS); % Generate Load Line>> plot(vds,idsll,'k:')>> hold on % hold plot to superimpose other plots >> ids50 = nmos(vds,vto+70e-3,KP,W,L,vto); % TC for 70mV above threshold>> plot(vds,ids50,'r')>> ids50 = nmos(vds,vto+110e-3,KP,W,L,vto); % TC for 110mV above threshold>> plot(vds,ids50,'c')>> ids50 = nmos(vds,vto+150e-3,KP,W,L,vto); % TC for 150mV above threshold>> plot(vds,ids50,'b')Load Line Analysis Example0 2 4 6 8 10 120123456x 10-3VDS in VoltsID in AmpsVGS=2.5+70mV VGS=2.5+110mV VGS=2.5+150mV 2.7V, 4.63mA 10.04V, 9.8mA If changes about VGSQare consider the input, and changes in VDSQare considered the output, then the gain of this system is:mV70150V720410)()..(−−==GSDSVVVG∆∆7591.=VGBiasing NMOS VoltagesKVL can be applied to relate the gate voltage to the drain-source currents:DSGSGGIRVV=−Since virtually no current flows into the gate, VGGcan easily be set by properly choosing R1and R2. KVL around the VGGloop yields another important equation:When biasing in the saturation region VGScan also be related to the drain current by:2)(trGSDVVKI −=R1R2RDRSID+Vout_+VDD_GSDFind K from Curve TraceRecall at the start of saturation the following holds:2DSDKVI =2222435151705140 ......KKKKVIDSD====From graph:One way to estimate K is to compute it for each equation and take the average. In this case it becomes K=.137 A/V2Find K from Curve Trace (LS)()21221∑=−=MiDSiDiKVIME2222435151705140 ......KKKKVIDSD====From graph:A better approach uses a least-squares solution that gives the error in each equation equal weight. Find K to minimize