11Electrical and Computer EngineeringCPE/EE 422/522Spring 2004Chapter 1 - Review of LogicDesign FundamentalsDr. Rhonda Kay GaedeUAHElectrical and Computer EngineeringSpring 2004 Slide #2UAH CPE/EE 422/522Chapter 1¥ Combinational Logic has no control inputs. When theinputs to a combinational network change, the outputchanges ____________________________.1.1 Combinational Logicx1x2xnz1z2zmX = x1 x2... xnZ = z1 z2... zm2Electrical and Computer EngineeringSpring 2004 Slide #3UAH CPE/EE 422/522Chapter 11.1 Combinational Logic -Basic Logic GatesElectrical and Computer EngineeringSpring 2004 Slide #4UAH CPE/EE 422/522Chapter 11.1 Combinational Logic -Full Adder (Minterm Form)ModuleTruth tableX Y Cin Cout Sum0 0 0 0 00 0 1 0 10 1 0 0 10 1 1 1 01 0 0 0 11 0 1 1 01 1 0 1 01 1 1 1 1m-formSum =Cout =Sum =Cout =3Electrical and Computer EngineeringSpring 2004 Slide #5UAH CPE/EE 422/522Chapter 11.1 Combinational Logic -Full Adder (Maxterm Form)ModuleTruth tableX Y Cin Cout Sum0 0 0 0 00 0 1 0 10 1 0 0 10 1 1 1 01 0 0 0 11 0 1 1 01 1 0 1 01 1 1 1 1Sum =Sum =Cout =Cout =m-formSum =Cout =Electrical and Computer EngineeringSpring 2004 Slide #6UAH CPE/EE 422/522Chapter 11.2 Boolean Algebra andAlgebraic Simplification¥Some routines are widely used and been pooledinto subroutine libraries.¥Operating systems are programs that manage theresources of a computer for the benefit of theprograms that run on that machine¥Software Categories—Systems - OS, compilers, assemblers, etc.—Applications - spreadsheets, text editors, etc.4Electrical and Computer EngineeringSpring 2004 Slide #7UAH CPE/EE 422/522Chapter 11.3 More Boolean Algebra andAlgebraic SimplificationElectrical and Computer EngineeringSpring 2004 Slide #8UAH CPE/EE 422/522Chapter 11.2 Boolean Algebra with Exclusive ORX0X =⊕’X1X =⊕0XX =⊕1’XX =⊕XYYX ⊕=⊕(Commutative law))ZY(XZ)YX( ⊕⊕=⊕⊕XZXY)ZY(X ⊕=⊕(Distributive law)’Y’XXYY’X’YX)’YX( +=⊕=⊕=⊕5Electrical and Computer EngineeringSpring 2004 Slide #9UAH CPE/EE 422/522Chapter 11.3 Karnaugh Maps¥ Convenient way to simplify logicfunctions of 3, 4, 5, (6) variables¥ Four-variable K-map— Each square____________________________¥1 ________________________________¥ 0______________________________¥d ____________________________— ------------------------------------------— --------------------------------------— adjacent cells____________________________Electrical and Computer EngineeringSpring 2004 Slide #10UAH CPE/EE 422/522Chapter 11.3 Karnaugh Maps - ExamplesADCBADCB6Electrical and Computer EngineeringSpring 2004 Slide #11UAH CPE/EE 422/522Chapter 11.3 Karnaugh Maps - Sum of Products¥ Function consists of a sum of _________________¥ Prime implicant____________________________________________________________________________________________¥ Prime implicant is ______________ if it contains a 1 thatis not contained in any other prime implicantElectrical and Computer EngineeringSpring 2004 Slide #12UAH CPE/EE 422/522Chapter 11.3 Karnaugh Maps -Prime Implicant Selection¥ Two minimum formsf =f =ADCB7Electrical and Computer EngineeringSpring 2004 Slide #13UAH CPE/EE 422/522Chapter 11.3 Karnaugh Maps -Selection Procedure1. Choose a 1 (minterm) that has not been covered yet2. Find all 1s and ds adjacent to that minterm. (Checkthe n adjacent squares on an n-variable map.)3. If a single term covers the minterm and all theadjacent 1s and ds, then that term is an essentialprime implicant, so select that term.4. Repeat steps 1, 2, 3 until all essential primeimplicants have been chosen5. Find a minimum set of prime implicants that coverthe remaining 1s on the map. If there is more thanone such set, choose a set with a minimum numberof literalsElectrical and Computer EngineeringSpring 2004 Slide #14UAH CPE/EE 422/522Chapter 11.4 Designing with NANDand NOR Gates¥ Implementation of NAND and NOR gates is easierthan that of AND and OR gates (e.g., CMOS)8Electrical and Computer EngineeringSpring 2004 Slide #15UAH CPE/EE 422/522Chapter 11.4 Designing with NAND and NOR Gates (continued)¥ Any logic function can be realized using onlyNAND or NOR gates -___________________________________—1:—0:—a:— ab:— a+b:Electrical and Computer EngineeringSpring 2004 Slide #16UAH CPE/EE 422/522Chapter 11.4 Designing with NAND and NOR Gates -Conversion to NOR Gates¥ Start with POS (Product Of Sums)— circle 0s in K-maps¥Find network of OR and AND gates9Electrical and Computer EngineeringSpring 2004 Slide #17UAH CPE/EE 422/522Chapter 11.4 Designing with NANDand NOR Gates -Conversion to NAND Gates¥ Start with SOP (Sum of Products)— circle 1s in K-maps¥Find network of OR and AND gatesElectrical and Computer EngineeringSpring 2004 Slide #18UAH CPE/EE 422/522Chapter 11.13 Tristate Logic and Busses¥Four kinds of tristate buffersB is a control input used to enable and disable the output10Electrical and Computer EngineeringSpring 2004 Slide #19UAH CPE/EE 422/522Chapter 11.13 Tristate Logic and Busses -Data