IntroductionOverview1This document is originally distributed by AVRfreaks.net, and may be distributed, reproduced, and modified without restrictions. Updates and additional design notes can be found at: www.AVRfreaks.netwww.AVRfreaks.netDESIGN NOTEAUTHOR:KEYWORDS:#045Using Shift Registers to Increase the Number of Input/Output PinsIntroduction Inevitably during the design of a microprocessor based device a larger than desiredmicroprocessor is chosen because of the high number of I/O lines required. In thisdesign note we shall look at Shift Registers as a mean of increasing the number of I/Olines.Overview The SPI port on most AVR micros is ideal for controlling Shift Registers. Even if youdon’t have an SPI port you can still bit-bang the data out using normal I/O pins.Below are some examples of the use of Shift Registers.Figure 1. Example One of Shift Resgister UseIn the Figure 1 example each of the digits required are simply loaded in turn into the SPIData Register and shifted out in turn. Because the SPI data rate is so high the updatewill not be seen by the human eye and the processor is not burdened by the multiplexingtask, not to mention that only two pins were used.MISOSCKQ1 Q8Shift RegisterData INData OUTClockQ1 Q8Shift RegisterData INData OUTClockQ1 Q8Shift RegisterData INData OUTClockQ1 Q8Shift RegisterData INData OUTClockDesign Note #045 – Date: 02/03SHIFT REGISTERS, PORT EXPANTION, SPILUKE SANGALLIwww.AVRfreaks.net2Design Note #045 – Date: 02/03Figure 2. Example Two of Shift Resgister UseIn Figure 2 a Shift Register with a PL (Parallel Load) pin is used to serve as a keyboardinput stage.The data can be shifted into the seven segment displays while at the same time readingthe switches.Here is a sequence to achieve this task:1. Toggle PBn to latch the switch settings into the Shift Register on the far right.2. Place the least significant digit into the SPI TX Register and shift the byte out.3. Read the received byte in the SPI RX Register which is the switch settings.4. Place the next three digits into the SPI TX Register in turn and shift them out.This Shift Register technique can also be used to set up addresses to large amounts ofStatic RAM.32K and 64K Static RAM chips are relatively cheap these days and unlike DRAM caneasily be memory backed up.The important thing to realise though is that only devices which are synchronous can becontrolled this way.For example if the 32 Static RAM chip were to be left enabled and in Write mode whilethe address was being clocked in you would corrupt 16 other locations on your way tosetting up the right address.It is also important to realise that even though some devices may not seem suitable tobe controlled in this manner sometimes they can. For example lets take a garden water-ing system with relays used to activate the water valves. Normally you would not wantthem to turn on and off as the new watering combination is clocked into the Shift Regis-ter, however relay dynamics prevent them from responding to any glitches over 1 kHzand thus will not be affected by the >100 kHz SPI clock rate.MISOSCKQ1 Q8Shift RegisterData INData OUTClockQ1 Q8Shift RegisterData INData OUTClockQ1 Q8Shift RegisterData INData OUTClockQ1 Q8Shift RegisterData INData OUTClockQ1 Q8Shift RegisterData INData