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Efficient Techniques for Accurate Modeling and Simulation of Substrate

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CDROM Home PageDATE98 Home PageFront MatterTable of ContentsSession IndexAuthor IndexEfficient Techniques for Accurate Modeling and Simulation of SubstrateCoupling in Mixed-Signal IC’sJo˜ao Paulo Costa Mike Chou L. Miguel [email protected] [email protected] [email protected]/Cadence European Laboratories Research Laboratory of ElectronicsDept. of Electrical and Computer Engineering Dept. of Electrical Eng. and Computer ScienceInstituto Superior T´ecnico Massachusetts Institute of TechnologyLisboa, 1000 Portugal Cambridge, MA, 02139AbstractIndustry trends aimed at integrating higher levels of circuit func-tionality have triggered a proliferation of mixed analog-digitalsystems. Magnified noise coupling through the common chip sub-strate has made the design and verification of such systems anincreasingly difficult task. In this paper we present a fast eigen-decomposition technique that accelerates operator application inBEM methods and avoids the dense-matrix storage while tak-ing all of the substrate boundary effects into account explicitly.This technique can be used for accurate and efficient modeling ofsubstrate coupling effects in mixed-signal integrated circuits.1 IntroductionIndustry trends aimed at integrating higher levels ofcircuit functionality resulting from an emphasis on com-pactness in consumer electronic products and a widespreadgrowth and interest in wireless communications, have trig-gered a proliferation of mixed analog-digital systems. Sin-gle chip mixed-signal designs combining digital and analogblocks built over a common substrate, provide reduced lev-els of power dissipation, smaller package count, as well assmallerpackage interconnect parasitics. Thedesignofsuchsystems however,is becoming an increasingly difficult taskowing to the various coupling problems that result from thecombined requirements for high-speed digital and high-precision analog components. Noise coupling through thecommon chip substrate, caused by the nonideal isolationhas been identified as a significant contributor to the cou-pling problem in mixed-signal designs [1, 2, 3, 4]. Fastswitching logic components inject current into the substratecausing voltage fluctuation which can affect the operationof sensitive analog circuitry through the body-effect, sincethetransistorthresholdis a strong function of substrate bias.The most common way to deal with these problemsis to resort to costly trial and error techniques. Clearlysuch a methodology, is not adequate in the face of risingfabrication costs and increasing demands for shorter designcycle times [4]. Several approaches have been presented inthe past to attempt to quantify the effects of noise couplingthrough the substrate. Examples of such techniques includeFinite Element (FEM) and Finite Diference (FD) numericalmethods for computing all the currents and voltages in thesubstrate [1, 2, 5, 6, 7]. Unfortunately such methods areimpractical for anything but simple problems, since thenumber of unknowns resulting from the discretization istoo largebecauseofvolume-meshingoftheentiresubstrate.Device simulators such as MEDICI and PISCES can alsobe used for this task. However they are in general too slow.Boundary-Element methods (BEM) have been appliedwith some success to the problem of modeling substratecoupling. BEM methods are appealing for the solution ofthis type of problems because by requiring only the dis-cretization of the relevant boundary features they dramat-ically reduce the size of the system to be solved. In [8]a Green’s function for a two-layer substrate without back-plane is used. In [9, 10] a distinct approach is taken inthat point to point impedances are precomputed and laterinterpolated to find the admittance model. In both meth-ods accuracy can be compromised due to the assumptionof infinite lateral dimensions if some of the contacts areplaced near the physical walls of the substrate. In [11] aGreen’s function is derived that takes into account the ac-tual properties of the domain. Here a 2D DCT (DiscreteCosine Transform), implemented efficiently with an FFTalgorithm, is performed thus avoiding repeated computa-tion of the Green’s function.In general the computational effort involved in comput-ing a model using BEM methods is considerable mostlybecause the matrices involved are dense. This fact has lim-ited the usage of such methods to small to medium sizeproblems. In this paper we present a novel eigendecompo-sition method, used in a Krylov subspace solver, that elim-inates dense-matrix storage and speeds up operator-vectorapplication significantly. This method is used to speedupthe computations necessary for computing substrate mod-els in a BEM formulation and allows for the extraction ofsubstrate models in problems containing several hundredsurface unknowns. The resulting model can readily be in-corporated into standard circuit simulators such as SPICE orSPECTRE to perform coupled circuit-substrate simulation.In Section 2 we present some background on substratecoupling modeling and BEM methods. Then, in section 3we present our algorithm based on a functional eigende-composition of the substrate current to voltage operatorand show how to use it to speed up substrate extraction.In section 4 the efficiency and storage requirements of theproposed method are discussed. In section 5 we includeexamples that illustrate the efficiency and accuracy of thetechniques described. Finally, in section 6, we presentsome conclusions from our work.2 Background2.1 Problem FormulationFor typical mixed-signal circuits operating at frequen-cies below a few gigahertz, the substrate behaves resis-tively [3, 9]. Assuming this electrostatic approximation,the substrate can be modeled as a stratified medium com-posed of several homogeneous layers characterized by theirconductivity, as shown in Figure 1. On the top of this stackof layers a number of ports or contacts are defined, whichcorrespond to the areas where the designed circuit interactswith the substrate. Examples of these contacts include pos-sible noise sources or receptors, such as contacts from sub-strate or wells to supply lines, drain/source/channel areasof transistors, etc. Figure 1 exemplifies the typical modelassumed for the substrate and examples of contact areasor terminals. The contacts on the substrate top are usuallyassumed to be planar (bidimensional). The bottom of thesubstrate is either attached through some large contact tosome fixed voltage


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