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MASON ECE 645 - Lecture 8 Sequential Multipliers

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Slide 1Slide 2Slide 3Slide 4Slide 5Slide 6Slide 7Slide 8Slide 9Slide 10Slide 11Slide 12Signed MultiplicationSlide 14Slide 15Slide 16Slide 17Slide 18Slide 19Slide 20Slide 21Slide 22Slide 23Slide 24Slide 25Slide 26Slide 27Slide 28Slide 29Higher Radix MultiplicationSlide 31Slide 32Slide 33Slide 34Slide 35Slide 36Slide 37Slide 38Slide 39Slide 40Slide 41Slide 42Slide 43Slide 44Slide 45Slide 46Slide 47Slide 48Slide 49Slide 50Slide 51Slide 52Systolic ArraySlide 54Slide 55Slide 56Slide 57Slide 58Slide 59Slide 60Slide 61Slide 62Slide 63Slide 64Slide 65Slide 66Sequential MultipliersLecture 8Required ReadingChapter 9, Basic Multiplication SchemeChapter 10, High-Radix MultipliersChapter 12.3, Bit-Serial MultipliersChapter 12.4, Modular MultipliersNote errata at:http://www.ece.ucsb.edu/~parhami/text_comp_arit_1ed.htm#errorsBehrooz Parhami, Computer Arithmetic: Algorithms and Hardware DesignRequired ReadingJ-P. Deschamps, G. Bioul, G. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems Chapter 12.2.2.1, Booth-1 MultiplierChapter 12.2.2.2, Booth-2 MultiplierChapter 12.2.3, FPGA Implementation of the Booth-1 Multiplier(handout distributed in class)Notationa Multiplicand ak-1ak-2 . . . a1 a0x Multiplier xk-1xk-2 . . . x1 x0p Product (a  x) p2k-1p2k-2 . . . p2 p1 p0If multiplicand and multiplier are of different sizes, usually multiplier has the smaller sizeMultiplication of two 4-bit unsigned binary numbers in dot notationPartial Product 0Partial Product 1Partial Product 2Partial Product 3Number of partial products = number of bits in multiplier xBit-width of each partial product = bit-width of multiplicand aBasic Multiplication Equationsx =  xi  2ii=0k-1p = a  x p = a  x =  a  xi  2i = = x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 i=0k-1Shift/Add AlgorithmRight-shift versionShift/Add AlgorithmsRight-shift algorithmp = a  x = x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 = (...((0 + x0a2k)/2 + x1a2k)/2 + ... + xk-1a2k)/2 = k times=p(0) = 0p = p(k)p(j+1) = (p(j) + xj a 2k) / 2j=0..k-1Sequential shift-and-add multiplier forright-shift algorithmRight-shiftmultiplicationalgorithm: ExampleArea optimization for the sequential shift-and-add multiplier with the right-shift algorithmShift/Add AlgorithmsRight-shift algorithm: multiply-add= (...((y2k + x0a2k)/2 + x1a2k)/2 + ... + xk-1a2k)/2 = k timesp(0) = y2kp = p(k)p(j+1) = (p(j) + xj a 2k) / 2j=0..k-1= y + x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 = y + a  xSigned Multiplication•Previous sequential multipliers are for unsigned multiplication•For signed multiplication:–assume sign-extended operation for p(j) + xja– if 2's complement multiplier is POSITIVEright-shift sequential algorithms (shift-add) will work directly–if 2's complement multiplier is NEGATIVE than we must use "negative weight” for xk-1 and subtract xk-1a in the last cycle•Slight increase in area due to control and one-bit sign extension on inputs of adder–Unsigned: k bit number + k bit number  k+1 bit number–Signed: k+1 bit sign extended number + k+1 bit sign extended number  k+1 bit numberSequential multiplication of 2’s-complementnumbers with right shifts(positive multiplier)Sequential multiplication of 2’s-complementnumbers with right shifts(negative multiplier)Shift/Add AlgorithmLeft-shift versionShift/Add AlgorithmsLeft-shift algorithmp = a  x = x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 = (...((02 + xk-1a)2 + xk-2a)2 + ... + x1a)2 + x0a= k times=p(0) = 0p = p(k)p(j+1) = (p(j) 2 + xk-1-ja)j=0..k-1Sequential shift-and-add multiplier forleft-shift algorithmLeft shifts are not as efficient fortwo's complement because mustsign extend multiplicand by k bitsLeft-shiftmultiplicationalgorithm: Examplep(0) = y2-kp = p(k)p(j+1) = (p(j) 2 + xk-(j+1)a)j=0..k-1Shift/Add AlgorithmsLeft-shift algorithm: multiply-add= (...((y2-k 2 + xk-1a)2 + xk-2a)2 + ... + x1a)2 + x0a = k times= y + xk-1a2k-1 + xk-2a2k-2 + … + x1a21 + x0a = y + a  xHigh-Radix Sequential MultipliersHigh-Radix Notationa Multiplicand (ak-1ak-2 . . . a1 a0)rx Multiplier (xk-1xk-2 . . . x1 x0)rp Product (a  x) (p2k-1p2k-2 . . . p2 p1 p0)rRadix-4, or two-bit-at-a-time, multiplication in dot notationBasic Multiplication Equationsx =  xi  rii=0k-1p = a  x p = a  x =  a  xi  ri = = x0ar0 + x1a r1 + x2a r2 + … + xk-1a rk-1 i=0k-1High-Radix Shift/Add AlgorithmsRight-shift high-radix algorithmp = a  x = x0ar0 + x1ar1 + x2ar2 + … + xk-1ark-1 = (...((0 + x0ark)/r + x1ark)/r + ... + xk-1ark)/r = k times=p(0) = 0p = p(k)p(j+1) = (p(j) + xj a rk) / rj=0..k-1High-Radix Shift/Add AlgorithmsLeft-shift high-radix algorithmp = a  x = x0ar0 + x1ar1 + x2ar2 + … + xk-1ark-1 = (...((0r + xk-1a)r + xk-2a)r + ... + x1a)r + x0a= k times=p(0) = 0p = p(k)p(j+1) = (p(j)  r + xk-1-ja)j=0..k-1The multiple generation part of a radix-4multiplier with precomputation of 3aExample of radix-4 multiplicationusing the 3a multipleThe multiple generation part of a radix-4multiplier based on replacing 3a with 4a (carry into next higher radix-4 multiplier digit) and -aHigher Radix Multiplication •In radix-8, one must precompute 3a, 5a, 7a –Overhead becomes prohibitive and does not help•However, when we discuss CSA this may be usefulRadix-2 Booth Recodingijj+1Radix-2 Booth Recodingyi = -xi + xi-1Sequential multiplication of 2’s-complementnumbers with right shifts using Booth’s recodingRadix-2 BoothMultiplierBasic StepRadix-2 BoothMultiplierBasic Stepin Xilinx FPGAsRadix-2 Booth Multiplierin Xilinx FPGAsRadix-4 Booth Recoding(1) -1 0 1 0 0 -1 1 0 -1 1 -1 1 0 0 -1 0zi/2 = -2xi+1 + xi + xi-1Example radix-4 multiplication with modifiedBooth’s recoding of the 2’s-complementmultiplierThe multiple generation part of a radix-4multiplier based on Booth’s recodingRadix-4 BoothMultiplierBasic StepRadix-4 Booth Multiplier:Left Shifter & ControlShift/Add AlgorithmRight-shift versionwith Carry-Save AdderSequential shift-and-add multiplierwith a carry save adderHigh-Radix Multiplierswith Carry-Save AdderRadix-4 multiplication with a carry-save adderused to combine the cumulative partial product, xia, and 2xi+1a into two numbersRadix-4 multiplier with a carry-save adder and Booth’s recodingBooth recoding and multiple selection logic


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