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An FET Audio Peak Limiter

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1An FET Audio Peak LimiterW. Marshall Leach, Jr., ProfessorGeorgia Institute of TechnologySchool of Electrical and Computer EngineeringAtlanta, Georgia 30332-0250 USAemail: [email protected]° 1998-2008. All Rights Reserved.Abstract— A high-quality peak limiting amplifier is de-scribed which uses a p-channel field-effect transistor as thevariable gain element.I. INTRODUCT IONPeak limiter and compressor amplifiers are ba-sic audio signal processing tools that are found inrecording studios, broadcast installations, public ad-dress systems, etc., where the automatic control ofaudio signal levels is desired. A peak limiter is acircuit which monitors the peak level of a signal. Ifthe peak exceeds a preset limit threshold, the gain ofthecircuitisreducedsoastopreventthepeakfromexceeding the threshold. Some of the applicationsof peak limiters are to prevent over modulation ofbroadcast transmitters, to prevent distortion causedby overload of audio recorders, to pre vent overdri veof analog-to-digital converters, and to protect loud-speakers in public address systems.A compressor amplifier is similar to a limiter am-plifier in that it reduces gain when the input signal ex-ceeds a preset threshold. However, compressors areusuallydesignedtohaveattack and release times thatare slower than those of limiters so that a compressorcannot be used to reliably control the peak levels in asignal. The principle application of a compressor isto maintain the average lev e l of an audio signal con-stant. In broadcast applications, a compressor and alimiter in combination are used to maintain consis-tently high modulation levels without over modula-tion. Indeed, most radio stations engage in “loudnesswars” by multi-stage processing the signal so that itsounds louder than the competition. This is one ofthe principal reasons that broadcast audio quality isoftensopoor.This paper describes the design of a high-quality,low-noise limiter which is virtually transparent in itsoperation. The circuit uses a field-ef fect transistor(FET) as a variable resistor in the shunt arm of a volt-age variable attenuator. Feedback is used to linearizethe square-law term in the FET characteristic for lowdistortion operation. Thepeaklevelofthelimiteroutput is detected by a threshold detector which hasa current output as opposed to the usual voltage out-put. This provides improved stability of the feedbackdetector control circuit with less peak overshoot ofthe output signal.Some limiters and compressors use a feedforwarddetector for the gain reduction scheme. If the lev elof the input signal increases above a preset thresh-old, the gain is reduced. The problem with suchcircuits is that the detector does not kno w what theoutput signal is doing. It is like adjusting the tem-perature of the water in a shower without being inthe shower where you can feel the water. Feedfor-ward compressors and limiters have an irritating au-dible signature, especially if they are not adjustedcorrectly. They can invert the loudness of a signal.That is, louder sounds come out sounding less loudthat quieter sounds. These very annoying effects canbe commonly heard in the audio on many cable TVchannels. The limiter described here does not exhibitany of these effects because it uses a feedback detec-tor which monitors the level of the output signal.Feedback detector limiters and compressors canbe unstable if the gain of the detector circuit is madetoo high. This is often done to minimize the out-put overshoot when gain reduction occurs. The in-stability causes the gain reduction to overshoot orto exhibit a “motorboating” effect. The circuit de-scribed here does not exhibit these problems. This2is primarily because the circuit uses a detector witha current source output rather than a voltage sourceoutput. The current output from the detector chargesacapacitorwhichactsasanintegratorfortheerrorsignal. A feedback control system with an integra-tor characteristic exhibits very low steady-state error.Thus the level to which the output signal is limiteddoes not increase as the input level increases.I have seen some very complicated FET limitercircuit designs. In contrast, the one described hereis very simple, requiring only a single quad op amp,one FET, and three BJTs. The simplicity of the cir-cuit should not be interpreted as an indicator of anyperformance limitations. It is very effective in its op-eration and very clean sounding.II. CIRCUIT DESCRIPTIONThe circuit diagram of the limiter is shown in Fig.1. FET J1is operated in its triode region as a vari-able resistor. Under conditions of no limiting, J1hasa high resistance and op amp A1operates as a unity-gain inverting amplifier. The output voltage vOismonitored by a full-wave detector circuit consistingof op amps A2and A3and transistor Q1,whichisnormally cut off. The limit threshold is set by the cur-rent through resistor R8. When the output voltage vOexceeds the threshold voltage in either the positive ornegative direction, A3driv es the base of Q1positiveso that collector current flows in Q1. This current ismirrored into capacitor vIby the current mirror con-sisting of transistors Q2and Q3. This makes the volt-age on C1to go positive, forcing the voltage output ofop amp A4to decrease from its quiescent value. Thiscauses the resistance of J1to decrease, thus decreas-ing the input signal to A1and causing vOto be peaklimited. Resistors R11and R12in the current mirrorimprove the current tracking between the two tran-sistors. A typical valuefortheseresistorsis100 Ω.After a peak is limited, C1discharges through R13causing the resistance of J1to increase at a controlledrate until the gain of A1is again unity. With J1re-moved from the circuit, R1through R3are chosen togiv e A1againthatis1% to 5% larger than unity. Po-tentiometer P1is adjusted so that the resistance of J1is decreased just enough to gi ve A1a quiescent gainof unity. This biases J1just into its active region sothat it is not cut off quiescently. Otherwise, therecould be a delay in the reaction time of the circuitwhen vOexceeds the limit threshold.Fig. 1. Circuit diagram of the limiter.Figure 2 illustrates the operation of the limiter. Ifthe peak output voltage exceeds the threshold volt-age VL, the gain is reduced so as to limit the peakto the threshold level. The gain decrease or attack isindicated in the figure by the clockwise rotation ofthe |vO| versus |vI| curve. After a peak is limited,the gain recovers or releases at


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