ECE 5440/6370 Advanced Digital DesignKeypad ScannerBasic 16-Key Keypad SchematicSlide 4Keyboard Row/Column AssignmentsKeypad ScanExercise: Complete the Timing Diagram for a Single ScanUniversity of HoustonECE 5440/6370Advanced Digital DesignLecture on KeypadYuhua ChenSpring 2010University of Houston2 - Yuhua Chen http://www.units.ohio-state.edu/images/keypad.jpgKeypad ScannerUniversity of Houston3 - Yuhua Chen Basic 16-Key Keypad SchematicRowColumnUniversity of Houston4 - Yuhua Chen Keypad ScannerKey-pressLogicKEY PADKey ReadySignalKey ValueScan and DebounceLogicKey ReadControlRowColFPGAPhysicalUniversity of Houston5 - Yuhua Chen Keyboard Row/Column AssignmentsBinary encoding of the key locationsNote: Row/col code does not necessarily match the key label (key value)ROW 03VccRRRRROW 1ROW 2ROW 301 25467COL 3COL 1COL 0COL 2Row 2 = 2’b10Col 1 = 2’b01 Output = {2’b10, 2’b01} = 4’h9Tri-statebufferSample:University of Houston6 - Yuhua Chen Keypad ScanR+5V0 VVccRRRRKey pressedt0: t0 t1KeypadScanner0 ZZ 0Z ZZ ZcolumnX t2 t3Z ZZ Z0 ZZ 01 1 1 1t1:1 1 1 0t2:1 1 1 1t3:1 1 1 1row0row1row2row3col0col1col2col3row0row1row2row3Time SlotUniversity of Houston7 - Yuhua Chen Exercise: Complete the Timing Diagram for a Single ScanR+5V0 VVccRRRRKey pressedt0: t0 t1KeypadScanner0 ZZ 0Z ZZ ZSingle Scan: Each row is asserted low oncecolumnX t2 t3Z ZZ Z0 ZZ 01 1 1 1t1:1 1 1 0t2:1 1 1 1t3:1 1 1 1row0row1row2row3col0col1col2col3row0row1row2row3Time SlotAssume Each Time Slot is 1
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