CH10 Input/OutputData TransfersExternal DevicesPowerPoint PresentationSlide 5Input/Output ProblemsPeripherals (Picture from Dr. Lee’s web site)Input/Output ModuleGeneric Model of an I/O ModuleI/O Module FunctionI/O StepsI/O Module DiagramI/O Module DecisionsInput Output TechniquesThree I/O TechniquesProgrammed I/OProgrammed I/O - detailAddressing I/O DevicesI/O MappingInterrupt Driven I/OSimple Interrupt ProcessingInterrupt Driven I/O Basic OperationCPU ViewpointDesign Issues??Identifying Interrupting ModuleMultiple InterruptsDirect Memory AccessDMA FunctionDMA OperationDMA Configurations (1)DMA Configurations (2)DMA Configurations (3)I/O ChannelsIt’s over…Phewww But what did we learn??So why do a presentation, when you can pay an extra $5 for pizza?CH10 Input/OutputCH10 Input/OutputData TransferData TransferExternal DevicesExternal DevicesI/O ModulesI/O ModulesProgrammed I/OProgrammed I/OInterrupt-Driven I/OInterrupt-Driven I/ODirect Memory Direct Memory Access (DMA)Access (DMA)I/O Channels and I/O Channels and ProcessorProcessorHI-TECH With Ankush Gera!Data TransfersData TransfersSynchronous ----- Usually occur when peripherals are located within the same computer as the CPU. Close proximity allows all state bits change at same time on a common clock.Asynchronous ----- Do not require that the source and destination use the same system clock.External DevicesExternal DevicesHuman readableHuman readableScreen, printer, Screen, printer, keyboardkeyboardMachine readableMachine readableMonitoring and controlMonitoring and controlCommunicationCommunicationModemModemNetwork Interface Network Interface Card (NIC)Card (NIC)Input/Output ProblemsInput/Output ProblemsWide variety of peripheralsWide variety of peripheralsDelivering different amounts of dataDelivering different amounts of dataAt different speedsAt different speedsIn different formatsIn different formatsAll slower than CPU and RAMAll slower than CPU and RAMNeed I/O modulesNeed I/O modulesPeripherals Peripherals (Picture from Dr. Lee’s web site)(Picture from Dr. Lee’s web site)Input/Output ModuleInput/Output ModuleInterface to CPU and MemoryInterface to CPU and MemoryInterface to one or more peripheralsInterface to one or more peripheralsGENERIC MODEL OF I/O DIAGRAM GENERIC MODEL OF I/O DIAGRAMGeneric Model of an I/O ModuleGeneric Model of an I/O ModuleI/O Module FunctionI/O Module FunctionControl & TimingControl & TimingCPU CommunicationCPU CommunicationDevice CommunicationDevice CommunicationData BufferingData BufferingError DetectionError DetectionI/O StepsI/O StepsCPU checks I/O module device statusCPU checks I/O module device statusI/O module returns statusI/O module returns statusIf ready, CPU requests data transferIf ready, CPU requests data transferI/O module gets data from deviceI/O module gets data from deviceI/O module transfers data to CPUI/O module transfers data to CPUVariations for output, DMA, etc.Variations for output, DMA, etc.I/O Module DiagramI/O Module DiagramData RegisterStatus/Control RegisterExternalDeviceInterfaceLogicExternalDeviceInterfaceLogicInputOutputLogicDataLinesAddressLinesDataLinesDataStatusControlDataStatusControlSystems Bus InterfaceExternal Device InterfaceI/O Module DecisionsI/O Module DecisionsHide or reveal device properties to CPUHide or reveal device properties to CPUSupport multiple or single deviceSupport multiple or single deviceControl device functions or leave for CPUControl device functions or leave for CPUAlso O/S decisionsAlso O/S decisionsInput Output TechniquesInput Output TechniquesProgrammedProgrammedInterrupt drivenInterrupt drivenDirect Memory Access (DMA)Direct Memory Access (DMA)Three I/O TechniquesThree I/O TechniquesProgrammed I/OProgrammed I/OCPU has direct control over I/OCPU has direct control over I/OSensing statusSensing statusRead/write commandsRead/write commandsTransferring dataTransferring dataCPU waits for I/O module to complete CPU waits for I/O module to complete operationoperationWastes CPU timeWastes CPU timeProgrammed I/O - detailProgrammed I/O - detailCPU requests I/O operationCPU requests I/O operationI/O module performs operationI/O module performs operationI/O module sets status bitsI/O module sets status bitsCPU checks status bits periodicallyCPU checks status bits periodicallyI/O module does not inform CPU directlyI/O module does not inform CPU directlyI/O module does not interrupt CPUI/O module does not interrupt CPUCPU may wait or come back laterCPU may wait or come back laterAddressing I/O DevicesAddressing I/O DevicesUnder programmed I/O data transfer is very Under programmed I/O data transfer is very like memory access (CPU viewpoint)like memory access (CPU viewpoint)Each device given unique identifierEach device given unique identifierCPU commands contain identifier (address)CPU commands contain identifier (address)I/O MappingI/O MappingMemory mapped I/OMemory mapped I/ODevices and memory share an address spaceDevices and memory share an address spaceI/O looks just like memory read/writeI/O looks just like memory read/writeNo special commands for I/ONo special commands for I/OLarge selection of memory access commands Large selection of memory access commands availableavailableIsolated I/OIsolated I/OSeparate address spacesSeparate address spacesNeed I/O or memory select linesNeed I/O or memory select linesInterrupt Driven I/OInterrupt Driven I/OOvercomes CPU waitingOvercomes CPU waitingNo repeated CPU checking of deviceNo repeated CPU checking of deviceI/O module interrupts when readyI/O module interrupts when readySimple Interrupt Simple Interrupt ProcessingProcessingInterrupt Driven I/OInterrupt Driven I/OBasic OperationBasic OperationCPU issues read commandCPU issues read commandI/O module gets data from peripheral I/O module gets data from peripheral whilst CPU does other workwhilst CPU does other workI/O module interrupts CPUI/O module interrupts CPUCPU requests dataCPU requests dataI/O module transfers dataI/O module transfers dataCPU ViewpointCPU ViewpointIssue read commandIssue read commandDo other workDo other workCheck for interrupt at end of each instruction Check for interrupt at end of each instruction cyclecycleIf interrupted:-If interrupted:-Save context (registers)Save context
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