Table of ContentsPreface1 Overview1.1 Enhanced SCI Module Overview1.2 Architecture1.2.1 SCI Module Signal Summary1.2.2 Multiprocessor and Asynchronous Communication Modes1.2.3 SCI Programmable Data Format1.2.4 SCI Multiprocessor Communication1.2.4.1 Recognizing the Address Byte1.2.4.2 Controlling the SCI TX and RX Features1.2.4.3 Receipt Sequence1.2.5 Idle-Line Multiprocessor Mode1.2.5.1 Idle-Line Mode Steps1.2.5.2 Block Start Signal1.2.5.3 Wake-UP Temporary (WUT) Flag1.2.5.4 Receiver Operation1.2.6 Address-Bit Multiprocessor Mode1.2.6.1 Sending an Address1.2.7 SCI Communication Format1.2.7.1 Receiver Signals in Communication Modes1.2.7.2 Transmitter Signals in Communication Modes1.2.8 SCI Port Interrupts1.2.9 SCI Baud Rate Calculations1.2.10 SCI Enhanced Features1.2.10.1 SCI FIFO Description1.2.10.2 SCI Auto-Baud1.2.10.3 Autobaud-Detect Sequence2 SCI Registers2.1 SCI Module Register Summary2.2 SCI Communication Control Register (SCICCR)2.3 SCI Control Register 1 (SCICTL1)2.4 SCI Baud-Select Registers (SCIHBAUD, SCILBAUD)2.5 SCI Control Register 2 (SCICTL2)2.6 SCI Receiver Status Register (SCIRXST)2.7 Receiver Data Buffer Registers (SCIRXEMU, SCIRXBUF)2.7.1 Emulation Data Buffer (SCIRXEMU)2.7.2 Receiver Data Buffer (SCIRXBUF)2.8 SCI Transmit Data Buffer Register (SCITXBUF)2.9 SCI FIFO Registers (SCIFFTX, SCIFFRX, SCIFFCT)2.10 Priority Control Register (SCIPRI)A Revision HistoryTMS320x2833x, 2823x Serial CommunicationsInterface (SCI)Reference GuideLiterature Number: SPRUFZ5AAugust 2008 – Revised July 20092 SPRUFZ5A – August 2008 – Revised July 2009Submit Documentation FeedbackContentsPreface ............................................................................................................................... 71 Overview ................................................................................................................. 111.1 Enhanced SCI Module Overview ......................................................................................... 121.2 Architecture ................................................................................................................. 141.2.1 SCI Module Signal Summary .................................................................................... 151.2.2 Multiprocessor and Asynchronous Communication Modes .................................................. 151.2.3 SCI Programmable Data Format ................................................................................ 151.2.4 SCI Multiprocessor Communication ............................................................................ 161.2.5 Idle-Line Multiprocessor Mode................................................................................... 171.2.6 Address-Bit Multiprocessor Mode ............................................................................... 181.2.7 SCI Communication Format ..................................................................................... 191.2.8 SCI Port Interrupts ................................................................................................ 211.2.9 SCI Baud Rate Calculations ..................................................................................... 221.2.10 SCI Enhanced Features ......................................................................................... 222 SCI Registers ........................................................................................................... 252.1 SCI Module Register Summary .......................................................................................... 262.2 SCI Communication Control Register (SCICCR) ...................................................................... 262.3 SCI Control Register 1 (SCICTL1) ....................................................................................... 272.4 SCI Baud-Select Registers (SCIHBAUD, SCILBAUD) ................................................................ 302.5 SCI Control Register 2 (SCICTL2) ....................................................................................... 302.6 SCI Receiver Status Register (SCIRXST) .............................................................................. 312.7 Receiver Data Buffer Registers (SCIRXEMU, SCIRXBUF) .......................................................... 332.7.1 Emulation Data Buffer (SCIRXEMU) ........................................................................... 332.7.2 Receiver Data Buffer (SCIRXBUF) ............................................................................. 332.8 SCI Transmit Data Buffer Register (SCITXBUF) ....................................................................... 342.9 SCI FIFO Registers (SCIFFTX, SCIFFRX, SCIFFCT) ................................................................ 342.10 Priority Control Register (SCIPRI) ....................................................................................... 36A Revision History ....................................................................................................... 39SPRUFZ5A – August 2008 – Revised July 2009 Contents 3Submit Documentation Feedbackwww.ti.comList of Figures1-1 SCI CPU Interface ......................................................................................................... 121-2 Serial Communications Interface (SCI) Module Block Diagram ..................................................... 131-3 Typical SCI Data Frame Formats ........................................................................................ 151-4 Idle-Line Multiprocessor Communication Format ...................................................................... 171-5 Double-Buffered WUT and TXSHF ...................................................................................... 181-6 Address-Bit Multiprocessor Communication Format ................................................................... 191-7 SCI Asynchronous Communications Format ........................................................................... 201-8 SCI RX Signals in Communication Modes .............................................................................. 201-9 SCI TX Signals in Communications Mode .............................................................................. 211-10 SCI FIFO Interrupt Flags and Enable Logic ............................................................................ 232-1 SCI Communication