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SJSU CS 147 - Cisc

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Slide 1Slide 2Slide 3Slide 4Slide 5Slide 6Slide 7Slide 8Slide 9Slide 10Slide 11Slide 12Slide 13Slide 14Slide 15Slide 16Slide 17Slide 18CISCNathan MurataCS 147NOT CISCNOT CISCNOT CISCNOT EVEN CLOSECISC =ComplexInstructionSetComputer CISC < RISC  CISC is a retroactive term to differentiate it from RISC (Reduced Instruction Set Computer)WHY CISC? Memory was expensive (forty years ago)= Cycle times are high Fewer calls to main memory CISC helps bridge the “Semantic Gap” between high-level programming languages and low-level instructions Maximize throughput, minimize costWhat is CISC?microprocessor instruction set architecture (ISA) in which each instruction can execute several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction.TASK1 data1TASK1 data2TASK2TASK3=>OPERATION data1 data2Multiplying two numbers, using CISC:The execution unit carries out computations, but only on data in one of the registers (labeled ABCDEF).CISC aims to carry out this task using as few lines of assembly code as possible. The processor hardware is built such that certain instructions are pre-built (such as MULT).MULT value1, value2 would take two values loaded in the registers and multiply the two numbers together and store that information in another register. This is done in one function, without loading or storing data in intermediate steps.This requires little translation of high-level language into assembly code and not much RAM to store instructions.The multiplication is carried out in one line of code rather than four (as in RISC):LOAD value1LOAD value2PROD value1, value2STORE registerSpace value1This requires two steps to load each value, a step to find the product, and one to store the value.It is important to note:1) CISC predates pipelining (allowing different instructions to use different parts of the execution unit) to keep the execution time constant.2) CISC allowed for compatibility and upscaling: a new processor design could incorporate the instruction set of its predecessor as a subset of an ever-growing language. 3) CISC made assembly language more like high-level language, so that the compiler does fewer functions.Some DISadvantages of CISC: Incorporating more into CISC leads to increasing complexity Because all needed instructions are hard-wired, more obscure instructions are rarely used, leading to less than optimal design The translation of complex instructions into basic ones may be more time-consuming than a series of simple instructions.Timeline:1960s: CISC architecture developed and largely unquestioned as the best way to design processors1970's: other non-CISC architectures are developed, theorized, or otherwise explored, although not used1980's: computer manufacturers still build more complex microprocessors with larger and larger sets of instructions. Some decided to explore RISC architecture.Modern era: The divide between CISC/RISC has dwindled over time. Many RISC microprocessors support large sets of instructions associated with CISC and CISC microprocessors incorporate many RISC techniques of design.Intel's Pentium chip is an amalgam of Complex/Reduced Instruction Set Computers and Parallel Instruction Computing has also been developed by Intel.EXAMPLES:Intel x86 processorsMotorola 68K


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SJSU CS 147 - Cisc

Documents in this Course
Cache

Cache

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Memory

Memory

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Memory

Memory

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Lecture 1

Lecture 1

53 pages

Quiz 1

Quiz 1

4 pages

LECTURE 2

LECTURE 2

66 pages

RISC

RISC

40 pages

LECTURE 2

LECTURE 2

66 pages

Lecture 2

Lecture 2

67 pages

Lecture1

Lecture1

53 pages

Chapter 5

Chapter 5

14 pages

Memory

Memory

27 pages

Counters

Counters

62 pages

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