Page 1 1 CS6810 School of Computing University of Utah Today’s topics: Some basic interconnect network concepts Topology 2 CS6810 School of Computing University of Utah Exploiting Concurrency • In multiple cores or multiple sockets communication takes center stage • Ubiquitous networking LAN & WAN space = Internet (you already know this stuff) » key is dealing with chaos • arbitrary machine platforms – big Endian vs. little – varying OS management layer • arbitrary topology – must support continual change – current user base 1.6 billion » result – general but inefficient • price to be paid for generality • layer model of who supports what – application, OS, NIC, router – 7 layer ISO model – which never is really implemented – but it’s the basic idea » doesn’t work in high performance parallel system world • where both performance and efficiency become critical 3 CS6810 School of Computing University of Utah High Performance Systems • One or multi-socket some cost functions change but game is similar » note common trend • multi-socket approach continually moves on-socket – perhaps with some low-level implementation changes • SAN – system area network focus on performance, reliability, packaging, and efficiency » performance • minimum packet latency for an unloaded system • average packet latency – under various load factors » reliability • SAN’s consider failure as rare – should provide some fault tolerance – K’s to M’s of components something is likely to fail » packaging • minimize SKU’s » efficiency • ED or ED2 product combined metric considerations 4 CS6810 School of Computing University of Utah SAN Difference • Proprietary vs. standards based? company X makes mondo parallel gizmo » see www.top500.org » they also create their own interconnect system • Datacenters and the “Cloud” are a bit different in-cabinet (in-rack) » possibly proprietary • top of rack switch – blade to blade efficient – convert to standard oriented comm between cabinets between cabinets » often more standards oriented • hypertransport • QPI • xGigE: x = 1/10/40/100 » switches • CISCO is the market leader – same switches for IP and SAN trafficPage 2 5 CS6810 School of Computing University of Utah 3 Essential Components • Topology graph of terminals and switches » focus today • Routing Algorithm how does a packet or message get from source to destination » heavy impact on lots of switch micro-architecture choices • buffering • virtual channels • flow control » deterministic, oblivious, adaptive • focus of the next lecture • Switch micro-architecture router/switch architecture » implement the routing algorithm » & support the traffic model • Key - all 3 are tightly coupled 6 CS6810 School of Computing University of Utah 2 Variants: Network Type • Indirect networks 2 kinds of switches 2 SKU’s » those that connect to terminals & switches • terminals – processors, storage, … – send and receive messages/packets • other switches – that form the core » those that connect only to other switches • sometimes called “core” switches • Direct networks 1 type of switch 1 SKU » each switch has some number of ports • some ports connect to other switches • some ports connect to terminals 7 CS6810 School of Computing University of Utah 2 Variants: Switching Type • Circuit switching create electrical path from source to destination » used in old telephone networks » super efficient • no intermediate header examination, buffering, etc. • real time performance was easy – busy vs. good to go » low throughput • no traffic interleaving • Packet switching break transaction up into packets » fixed or variable size » at each hop • examine destination, select route, send if route available – note extra work per hop hope count is an important metric » traffic interleaved increased resource utilization and throughput 8 CS6810 School of Computing University of Utah Topology • Consider first heavy influence on other interconnect decisions » routing algorithm and switch architecture BUT » except for that influence it might be the least important • Open ended game no way to cover all the options » e.g. describe all graphs lots of tower of Babel effects » topologically donut and coffee cup are the same • as are fat-tree (Leiserson) & folded-Clos (Dally) • Hierarchy is possible different topologies may occur at different levels • Today focus on some basic optionsPage 3 9 CS6810 School of Computing University of Utah Bus • Simplest and first interconnect we’ve seen adv. in snooping SMP configurations • Requires arbitration synchronous – can pipeline xfer & master asynchronous – detect collision and backoff » Ethernet choice • Problem: long = slow scalability, signal integrity, • Improvements slotted bus – TDM style wider to support multiple transactions 10 CS6810 School of Computing University of Utah Some Cost Issues • Radix of the switch number of inputs & outputs » here we’ll consider bi-directional links • # = radix (sometimes called “arity”) • NOTE: some literature: radix::= # inputs + # outputs – question link is 1 or 2 channels – 1 channel requires arbitration like the bus – 2 unidirectional channel’s/link is obvious choice – config. cost and cabling errors get reduced • Switching Diameter worst case hop count » effectively a measure of what happens when locality is rare • ITRS constraints pin count and per pin bandwidth expected to be flat choice » increase radix decrease link bandwidth decreased hops » tough choice 11 CS6810 School of Computing University of Utah Performance Issues • Bisection bandwidth cut network in half – bandwidth between halves » for some topologies choice of half
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