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Berkeley ELENG 290C - Switched Capacitor DC-DC Converters

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Switched Capacitor DC-DC Converters: Topologies and ApplicationsOutlineMotivationsIdeal Dickson’s Charge Pump(Phase 1)Ideal Dickson’s Charge Pump(Phase 2)Dickson’s Charge PumpNon-idealitiesModified SwitchModified Dickson’s Charge Pump #1 (NCP-1)Slide 10Modified Switch #2Modified Dickson’s Charge Pump #2 (NCP-2)Complete Circuit(NCP-2)Modified Dickson’s Charge Pump #3 (NCP-3)Converters Output Voltage ResultsOptimum Capacitance SelectionEfficiency and Output ImpedanceCross-Coupled Charge PumpH-bridge TopologyH-bridge TopologiesApplication (1): Flash MemorySlide 22Application (2): Sample SwitchesApplication (3): Low voltage AmplifierConclusionSwitched Capacitor DC-DC Converters: Topologies and ApplicationsBill Tsang and Eddie NgOutlineMotivationsDickson’s Charge PumpOther Various Charge PumpsApplicationsConclusionMotivationsInductorlessOn-chip integrationLow costHigh switching frequencyEasy to implement (open-loop system) Fast transient but large rippleHigh efficiency but limited output powerIdeal Dickson’s Charge Pump(Phase 1)clk_barVDD VoC1 C2 C3clkVDD-Vt2VDD-VtVDD0VDD• Clk=0, Clk_bar=VDD• Finite diode voltage drops, VtVDD-Vt VDD-VtIdeal Dickson’s Charge Pump(Phase 2)clk_barVDD VoC1 C2 C3clkVDD-Vt2VDD-2Vt2VDD-Vt3VDD-2VtVDDVDD0• Clk=VDD, Clk_bar=0• Maximum voltage stress on diodes 2VDD-Vt => reliability issue• Maximum voltage stress on capacitors VCn =n(VDD-Vt) => reliability issueVDD-VtDickson’s Charge Pump)(popCCfICCCVVthVV clk_barVDD VoV1V1+dV1V2V2+dV2C1 C2 C3Cp Cp Cpclkv1 v2ttDDoutVVVNVV  )(*thVVC1=C2=C3=C(Body effect can be significant at later stages)Non-idealitiesThreshold voltage drop [Mos charge pumps for low-voltage operation]Parasitic capacitor divider voltage drop Low conversion efficiency and pumping gain Limited maximum number of stages FFBSthoth2φ2φVγVV F2FthoDDout,max2φ2φγVVV )(2122VVVVVGtnV[An on-chip High-voltage generator circuit for EEPROMs with a power supply voltage below 2V]Modified SwitchVDDclkMD1MS12VDDVDDclkMD1CTS•Static Charge Transfer Switches (CTS)•Eliminate transistor threshold dropModified Dickson’s Charge Pump #1 (NCP-1))(*21VVVtn)(*22VVVtnVDDVoC1 C2 C3Cp Cp Cpclkclk_barC4 C5CpMD1MD2MD3MD4MS1MS2MS3MS4dVdVdVCpv1v2v3v1V2v3To turn on transistor Ms2; Vgs = 2VConditions:1, Clk=Vdd,Clk_bar=0: v2, v3+V2, Clk=0,Clk_bar=VDD: v1, v2+V,v3To turn off transistor Ms2; Vgs = 2VimpossibleModified Dickson’s Charge Pump #1 (NCP-1)Static Charge Transfer Switches (CTS)Better voltage pumping gain than diodesLower voltage equals upper voltage of pervious stage Utilizing higher voltage from following stage to drive CTS Reverse charge sharing since CTS cannot turn off completelyVVVGV122Modified Switch #2clkMD1MS1• Eliminate transistor threshold drop• Complete turn-off of switch, MS1Next stageMP1MN1MP1 used to turn on MS1MN1 used to turn off MS1Modified Dickson’s Charge Pump #2 (NCP-2)tpVV *2)(*22VVVtnC1 C2 C3Cp Cp Cpclkclk_barMD1MD2MD3MS1MS2MS3dVdVdVMP2MN2v1v2 v3)(*21VVVtnTo turn on transistor MP2 and MS2; Vgs = 2VConditions:1, Clk=Vdd,Clk_bar=0: v2, v3+V2, Clk=0,Clk_bar=VDD: v1, v2+V,v3To turn on transistor MN2 and turn off MS2; Vgs = 2VComplete Circuit(NCP-2)VoC1 C2 C3Cp Cp Cpclkclk_barqC4 C5CpMD1MD2MD3MD4MS1MS2MS3MS4dVdVdVCpMP2MN2v1v2 v3•Careful PMOS well connection to prevent latch-up•Diode-connected output stage usedModified Dickson’s Charge Pump #3 (NCP-3)NCP-3 uses boosted clock at output stageViVoC1 C2 C3Cp Cp Cpclkclk_barqC4C5CpMD1MD2MD3MD4MS1MS2MS3MS4dVdVdVHVClockGeneratorclkConverters Output Voltage ResultsOptimum Capacitance Selection)(pioutpiiDDCCfICCCVVVNVVDDout *  ioutDDiDDoutpiitotCfIVCVVCCCNC/*     )(//22DDoutoutDDiDDpiioutDDipiitotVVfIVCVCCCfIVCCCCCfVICfVIfVICDDoutpDDoutDDouti2min,[A Low-Ripple Switched-Capacitor DC-DC Up converter for Low-voltage applications]Efficiency and Output ImpedancePower loss due to: Vth, Rds(on), ESR, Cp, etcEfficiency estimationOutput impedance (slow switching)inoutVMV*[Performance limits of switched-capacitor DC-DC Converter][Performance limits of switched-capacitor DC-DC Converter]fCTqVRsouto1/M=ideal conversion ratioq=charge supplied to the source VoutTs=switching periodi= parasitic time constantsiTCross-Coupled Charge Pump111LLLoRsCsCIV[Area-efficient CMOS Charge Pumps for LCD Drivers])(2ondsLLddoRRRVVLLLrippleCCCfIV1112M10 M9phi1phi2CL1VDDVoRLC1C2• PMOS to transmit 2VDD to output• Bodies tied to source(highest voltage) to avoid forward biasing junction diodesH-bridge TopologyCommercial products (Linear Technology, Fairchild, Maxim …)Buck or Boost functionsNegative voltage generation13Oscillator and Control24H-bridge Topologies1324phi1phi2phi1phi2VinVoutVininverter1324phi1phi2phi1phi2VinVoutVindoubler4Vout132phi1phi2phi1phi2SplitterVinVout = -VinVout = 2VinVout = 0.5 VinPhase 1: transistors in red are onPhase 2: transistors in blue are onApplication (1): Flash MemoryFloating gate programmingControl gate voltage >> Vdd[ee141 lecture]Application (1): Flash MemoryNominal VDD= 5VApplication (2): Sample SwitchesS/H circuit– constant vgs sampling with all input level Reduces distortionReduces Rds(on)Phi_barVSSC1 C2VinVoM1M2M3M4M5M6M7M8M9M10 M9PhiPhi_barVDDM11C3AVo+Vo-CiCLOTA+--+CiCLCsvicmCsvicmphi1phi1dphi1dVi+Vi-phi1vicmphi2dphi2dvicmphi2phi2Voltage doublerApplication (3): Low voltage Amplifier Positive zero in Miller compensation1/gm pole-zero cancellation [charge-pump assisted low-power/low-voltage CMOS Opamp Design]V-Charge pumpVDDV+>2VGSConclusionDifferent Dickson’s SC converters discussedOptimal Capacitor size selection Discussion of cross-coupled doublers Commercial product: Full H-bridge Applications: Flash, ADC, Amplifier, LCD


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