Dayton ECT 464 - ECT 464 Outline Fall 2007

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ECT 464: Programmable Logic ControllersFall Semester 2007Class TimeMWF 11:00-11:50, KL-306Instructor Contact InformationInstructor: Mark PattersonOffice: KL491FPhone: 229-2962Email: [email protected] Hours: 10-11 MWF, 1-4 W, 1-3 FClass Website: http://academic.udayton.edu/MarkPatterson/ECT464/ect464.htmIntroduction Welcome to Programmable Logic Controllers (PLC’s). The purpose of this class is to teach you about the different kinds of programmable logic controllers and the equipment and language used. Programmable Logic Controllers exist in almost any factory controlling several processes and are sometimes even interlinked with each other. This equipment is an important part of any system or application. Several manufacturers build PLC’s however, they are basically the same. This course focuses on teaching the languages of PLC’s, the equipment used, and problems associated with PLC’s. The course will center on understanding the practical use of the equipment in everyday life and how they are used in real world situations.Course ObjectivesThe objectives of this course are:1. Study PLC architecture (CPU, memory and I/O). Emphasis will be placed on memory and CPU registers and the interpretation of their contents. (1.5 hrs.) 2. The introduction of manufacturing type input and output devices and how their states are stored in memory. (1 hr.)3. Introduction to the concepts of a PLC program and its execution. The events which occur during the execution of a PLC’s scan time will be studied in detail and related to those concepts previously studied. (2 hr.)4. Review of Boolean expressions, truth tables and simplification. Introduction to Ladder Logic Diagrams and how to implement Boolean expressions with them. (2 hrs.)5. Introduction to programming a PLC using a Hand Held Terminal (HHT). Ladder Logic Diagrams derived from Boolean expressions will be used as the application to be programmed. The assigned program designs are to be demonstrated by each student. (2 hrs.)6. Introduction to PLC Ladder Logic development for elementary manufacturing controlapplications. The development and structure of a ladder logic diagram from an algorithm is studied. Such applications as controlling assembly-lines with both time and event driven operations are examined. PLC’s based designs will be derived and implemented. The assigned projects are to be demonstrated by each student. (5.5 hrs.)7. Investigation of PLC timer and counter instructions. Industrial applications which utilize these instructions are studied. Design projects will be assigned and are to be demonstrated. (2 hrs.)8. Use of a personal computer (PC) to program a PLC will be studied and demonstrated.All future projects will require the use of a PC. In addition to programming, the PC will be used to monitor a running program. Assignments are to be demonstrated. (2.5 hrs.)9. The study of more advanced PLC instructions will be undertaken. These instructions include computational type Instructions. Design problems are to be implemented and demonstrated. (1 hr.)10. Introduction analog conversions. This introduction will cover the concepts of Analog-to-Digital Conversion (ADC) and Digital to Analog conversion (DAC). (3 hrs.)11. The design and implementation of analog control applications. (ADC and DAC). Designs are to be implemented and demonstrated. (3.5 hrs.)12. Introduction to Operator Interfacing. (1 hr.)13. Techniques to draw and animate a manufacturing system will be studied and implemented. (6.5hrs.)Homework Homework will be assigned on a weekly basis. It is to be completed individually, though interaction with ones fellow students is encouraged. The homework assignments will be turned in on Friday of the week that they are assigned. No late homework will be accepted without extenuating circumstances and prior approval.Exams There will be a midterm exam. A final comprehensive exam will also be given. The final exam will be comprehensive with an emphasis on the last half of the semester. The final exam will be given in class on the day indicated in the class bulletin. Quizzes Quizzes will be used as a means of providing quick feedback. Quizzes will usually be given right at the start of class. They will be short (5 min) and will typically be multiple choice or similar. All the quizzes together will count 5% or less (probably much less) of the final grade and will be considered as part of the homework grade. There will be no make-up for missed quizzes.Attendance PolicyMost of the information in PLC programming builds upon previous information. Missedclasses will be a serious detriment to your exam and lab performance. Tardiness more than 5 minutes interrupts the class and will be considered an absence. The instructor reserves the right to fail or reduce the grade of the student if more than five absences are recorded during the semester.GradingHomework & Quizzes 25%Labs 25%Midterm Exam 25%Final Exam 25%Prerequisites: SET 113 or ECT 224Text: Erickson. Programmable Logic Controllers; An Emphasis on Design and Application, Dogwood Valley Press, 2005. In addition to reading the book, you are encouraged to check out other books from the library or go online and get the manuals for the different types of PLC’s we use at http:\\www.allenbradley.com or http:\\www.siemens.com if you need to better understanda particular topic.Credits and Contact Hrs. (Lecture/Laboratory): 3 credits, 35 contact hours per semester.Students with disabilitiesIf any student in this class has a need for special testing arrangements, note taking, or other accommodations please feel free to discuss this with the instructor.Fall 2007 ECT 464 ScheduleDate Topic Reading HWW Aug 22 Introduction Ch 1F Aug 24 Introduction to A-B PLC’s Ch 1M Aug 27 PLC selection Ch 20W Aug 29 PLC applications, Binary review Ch 2F Aug 31 Basic Ladder Logic Ch 2 HW1 (web)M Sep 3 *LABOR DAY*W Sep 5 Basic Ladder Logic Ch 2F Sep 7 Boolean Conversion Ch 2 2:1-4M Sep 10 Boolean Simplification Ch 2W Sep 12 PLC Scan Cycles Ch 2F Sep 14 PLC Timing Diagrams Ch 2 2:5-7M Sep 17 Basic State Machines Ch 2W Sep 19 Machine Programs Ch 2F Sep 21 Advanced State Machines Ch 2 2:8-11M Sep 24 PLC modes Ch 3W Sep 26 I/O scans & Memory layout Ch 3F Sep 28 Input Wiring Ch 4 3:1-4 (d only)M Oct 1 Output


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Dayton ECT 464 - ECT 464 Outline Fall 2007

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