Hardware Software Codesign of Embedded SystemToday’s topicsCourse OrganizationCourse organization: GradingsCourse policiesTopics to be covered(order and details may change)Laboratory ActivitesTexts & ReferencesReading assignmentIntroductionMicroelectronics trendsMicroelectronics trendsDigital SystemsDigital SystemsHardware/Software CodesignConcurrent designCodesign motivationStory of IP coresStory of IP coresIP core reuseHardware ProgrammabilityFPGAsFPGAsFPGAsWhy codesign?Why codesign?Why codesign?Distinguishing features of digital systemApplication DomainsApplication DomainsEmbedded SystemEmbedded SystemsDegree of ProgrammabilityDegree of Programmability: AccessibilityDegree of Programmability: AccessibilityDegree of Programmability: AccessibilityDegree of Programmability: AccessibilityDegree of ProgrammabilityExample 2.Level of ProgrammabilityLevel of ProgrammabilityLevel of programmabilityProgrammabilityProgrammabilityPerformance and ProgrammabilityPerformance and ProgrammabilityPerformance and ProgrammabilityPerformance and ProgrammabilityProgrammability and Cost:ASIPsHardware TechnologyHardware Technology: FPGAsLevel of IntegrationEmbedded System Design ObjectiveCodesign of ISACodesign of ISAChallenges with ASIPTypical codesign processSteps in CodesignSteps in codesignModeling styleSteps in codesignSteps in codesignPartitioning and Scheduling (where and when)Summary:Research areas in codesignHardware Software Codesign of Embedded SystemCPSC689-602Rabi MahapatraMahapatra - Texas A&M - Spring 04 2Today’s topics• Course Organization• Introduction to HS-CODES• Codesign Motivation• Some Issues on Codesign of Embedded SystemMahapatra - Texas A&M - Spring 04 3Course OrganizationLectures: HRBB 104, TR 3:55 - 5:10 PMLaboratory: HRBB 218, TBDInstructor’s office Hours: By appointmentContact: [email protected], 5-5787Mahapatra - Texas A&M - Spring 04 4Course organization: GradingsProjects: 70% Seminar/Term paper/Assignment: 30%Labs: Team work Seminar/Term papers/Project: Individual or Team of two studentsMahapatra - Texas A&M - Spring 04 5Course policies• Required to access the course web page for relevant info during the semester• Class attendance is required • use emails for effective communication with Instructor• all assigned papers are required materials• follow lab and univ rulesMahapatra - Texas A&M - Spring 04 6Topics to be covered(order and details may change)1. Codesign overview2. Models and methodologies of system design3. Hardware software partitioning and scheduling4. Cosimulation, synthesis and verifications5. Architecture mapping, HW-SW Interfaces and Reconfigurable computing6. System on Chip (SoC) and IP cores7. Low-Power RT Embedded Systems8. On-chip Networking 9. Software for Embedded Systems10. Sensor NetworksMahapatra - Texas A&M - Spring 04 7Laboratory Activites• Synopsys’s Design Environment– Cocentric Tools for the class – use of SystemC• FPGA based design – use of Xilinx’s design environment and devices (VHDL / Verilog)• Can use Lab for project work• Embedded Systems: PowerPC, StrongARM and Motorola’s ColdFire• Low-Power measurement setup using LabView tools • Use of tools and language based on choice of projectsMahapatra - Texas A&M - Spring 04 8Texts & References• G Micheli, R Ernst and W.Wolf, editors, “Readings in Hardware/Software Co-Design”, Morgan Kaufman Publisher, 2002• Lecture notes: faculty.cs.tamu.edu/rabi/cpsc689/• Staunstrup and Wolf Ed. “Hardware Software codesign: principles and practice”, Kluwer Publication, 1997 (Reference)Mahapatra - Texas A&M - Spring 04 9Reading assignment• Giovanni De Micheli and Rajesh Gupta, “Hardware/Software co-design”, IEEE Proceedings, vol. 85, no.3, March 1997, pp. 349-365.Mahapatra - Texas A&M - Spring 04 10IntroductionDigital systems designs consists of hardware components and software programs that execute on the hardware platformsHardware-Software Codesign ?Mahapatra - Texas A&M - Spring 04 11Microelectronics trends• Better device technology– reduced in device sizes– more on chip devices > higher density– higher performancesMahapatra - Texas A&M - Spring 04 12Microelectronics trends• Higher degree of integration– increased device reliability– inclusion of complex designsMahapatra - Texas A&M - Spring 04 13Digital SystemsJudged by its objectives in application domain• Performance• Design and Manufacturing cost• Ease of ProgrammabilityMahapatra - Texas A&M - Spring 04 14Digital SystemsJudged by its objectives in application domain• Performance• Design and Manufacturing cost• Ease of ProgrammabilityIt depends on both the hardware and software componentsMahapatra - Texas A&M - Spring 04 15Hardware/Software Codesign A definition:Meeting System level objectives by exploiting the synergism of hardware and softwarethrough their concurrent designMahapatra - Texas A&M - Spring 04 16Concurrent designTraditional design flow Concurrent (codesign) flowstartstartSWHWHW SWDesigned by independentgroups of expertsDesigned by Same group of experts with cooperationMahapatra - Texas A&M - Spring 04 17Codesign motivationTrend toward smaller mask-level geometries leads to:• Higher integration and cost of fabrication. • Amortize hardware design over large volume productionsSuggestion:Use software as a means of differentiating products based on the same hardware platform.Mahapatra - Texas A&M - Spring 04 18Story of IP coresWhat are these IP Cores?Predesigned, preverified silicon circuit block, usually containing 5000 gates, that can be used in building larger application on a semiconductor chip.Mahapatra - Texas A&M - Spring 04 19Story of IP coresComplex macro cells implementing instruction set processors (ISP) are available as cores• Hardware (core)• Software (micro kernels)Are viewed as intellectual propertyMahapatra - Texas A&M - Spring 04 20IP core reuse• Cores are standardized for reuse as system building blocksRationale: leveraging the existing software layers including OS and applications in ESResults:1. Customized VLSI chip with better area/ performance/ power trade-offs2. Systems on SiliconMahapatra - Texas A&M - Spring 04 21Hardware ProgrammabilityTraditionally • Hardware used to be configured at the time of manufacturing • Software is variant at run timeThe Field Programmable Gate Arrays (FPGA)has blurred this distinction.Mahapatra - Texas A&M - Spring 04 22FPGAs• FPGA circuits can be configured on-the-fly to
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